 David Biancolin
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cfa7e30d95
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[clocks] Fix comment in ClockDividerN
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2020-09-17 11:32:51 -07:00 |
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David Biancolin
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b8d3e4a66d
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Update Idealized PLL config
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2020-09-16 16:30:25 -07:00 |
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David Biancolin
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8e4dedcecf
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Remove require guard on divided configs
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2020-09-16 16:30:00 -07:00 |
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David Biancolin
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895bacea98
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WIP - Simple divider-only PLL generation flow
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2020-09-16 16:00:26 -07:00 |
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Jerry Zhao
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269af01a70
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Bump testchipip
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2020-09-16 13:51:33 -07:00 |
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Jerry Zhao
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36ccb12560
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Bump testchipip
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2020-09-16 10:29:03 -07:00 |
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abejgonzalez
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f1b40d51af
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Connected clocks | Exposed Master TL port
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2020-09-15 12:58:58 -07:00 |
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Zitao Fang
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1543acfacd
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Merge branch 'dev' of github.com:ucb-bar/chipyard into sodor-integrate
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2020-09-14 23:55:05 -07:00 |
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Zitao Fang
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642441e0a2
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Replaced memory and fixed 3-stage single port arbiter
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2020-09-14 23:54:52 -07:00 |
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Jerry Zhao
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0d8e87126c
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Deprecate support for on-chip SerialAdapter
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2020-09-14 19:43:32 -07:00 |
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Jerry Zhao
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f9cc1dc2c2
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Merge remote-tracking branch 'origin/dev' into serial-tl
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2020-09-14 19:35:43 -07:00 |
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Jerry Zhao
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10625a3a6c
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Undo regression in iocells flexibility
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2020-09-14 13:27:31 -07:00 |
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Jerry ZhaoandGitHub
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16c80112a7
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Merge pull request #670 from ucb-bar/harness-refactor
Split IOBinders into IOBinders and HarnessBinders | punch out clocks to harness for simwidgets and bridges
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2020-09-14 12:45:46 -07:00 |
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Zitao Fang
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5506f77679
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Add CircleCI check and update Sodor config
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2020-09-14 09:14:57 -07:00 |
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Jerry Zhao
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6c5bce5430
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Support Tilelink over serial
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2020-09-13 11:59:16 -07:00 |
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Jerry Zhao
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d2b42cee2c
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Bump testchipip
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2020-09-12 23:31:54 -07:00 |
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Jerry Zhao
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a5385c0a54
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Update testchipip/icenet to use rocket-chip Located API
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2020-09-11 00:02:07 -07:00 |
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Zitao Fang
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15d53e2cda
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Bump to the latest Rocket
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2020-09-09 15:12:37 -07:00 |
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Jerry Zhao
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facef464e6
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Update BridgeBinders | fix runtime HarnessBinder port type checks
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2020-09-09 00:15:02 -07:00 |
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Jerry Zhao
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8f9574fd79
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Clean up passing ports from IOBinders to HarnessBinders
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2020-09-08 22:30:17 -07:00 |
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abejgonzalez
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56eead4053
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NOT WORKING: VCU118 Commit
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2020-09-08 17:04:56 -07:00 |
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Jerry Zhao
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11a9ad2428
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Address code review comments
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2020-09-08 15:52:09 -07:00 |
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abejgonzalez
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c49eef3224
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Small cleanup to CY DigitalTop | Move E300 configs to unique folder
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2020-09-07 15:26:30 -07:00 |
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Jerry Zhao
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7ed02a7d38
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Fix Typos
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2020-09-07 11:36:37 -07:00 |
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Zitao Fang
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fb7804070c
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Merge branch 'dev' of github.com:ucb-bar/chipyard into sodor-integrate
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2020-09-06 23:09:50 -07:00 |
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Zitao Fang
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11dcd71a48
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Clean up 5-stage instruction fetch
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2020-09-06 23:06:00 -07:00 |
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Jerry Zhao
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927244bf2e
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DTM only supports HTIF in DMI mode
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2020-09-05 11:45:06 -07:00 |
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Jerry Zhao
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ab21c53a42
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Add documentation on HarnessBinders
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2020-09-04 23:51:36 -07:00 |
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Jerry Zhao
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b613c14f1c
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Fix remaining HarnessBinders bugs
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2020-09-04 20:03:12 -07:00 |
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abejgonzalez
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8eb807a2fd
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Use DigitalTop in Platform | Use Chipyard BootRom
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2020-09-04 18:56:32 -07:00 |
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Jerry Zhao
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0f50e4d118
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Split IOBinders into IOBinders and Harness Binders | punch out clocks to harness for simwidgets and bridges
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2020-09-04 15:20:13 -07:00 |
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Jerry Zhao
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3258fd8db8
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Remove JTAG from firesim comfigs due to @(posedge ~clk) issue
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2020-09-03 23:53:51 -07:00 |
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abejgonzalez
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5a885fdcfd
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Delete old makefiles | Full switch to CY make system
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2020-09-03 21:28:05 -07:00 |
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Zitao Fang
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0995f1b04b
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UCode passed all tests
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2020-09-02 21:25:36 -07:00 |
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Jerry Zhao
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4b30462320
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Change default IO set to JTAG+Serial, instead of JTAG+DMI
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2020-09-02 20:19:27 -07:00 |
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Zitao Fang
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bb1d0a10ae
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Stage 3 (single port) passed all tests
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2020-08-31 18:00:40 -07:00 |
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Jerry Zhao
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c8448cc3e1
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Bore out a bus clock to drive DebugIO from ChipTop
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2020-08-30 18:10:52 -07:00 |
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Zitao Fang
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5c5af7bfad
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Stage 3 passed all tests
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2020-08-28 18:37:47 -07:00 |
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Jerry Zhao
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17239c56f8
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Update AddIOCells.debug comment
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2020-08-28 14:36:09 -07:00 |
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Jerry Zhao
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27b78f4de2
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Only punch realistic subset of DebugIO through chiptop
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2020-08-28 14:30:59 -07:00 |
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Jerry ZhaoandGitHub
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ee1ce1141c
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Merge pull request #614 from ucb-bar/diplomatic-clocks
Diplomatic multiclock
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2020-08-27 21:09:54 -07:00 |
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Jerry Zhao
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239b6b6e09
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Bump testchipip
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2020-08-27 13:00:43 -07:00 |
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Jerry Zhao
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e275a45890
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Address PR comments
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2020-08-26 12:34:46 -07:00 |
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abejgonzalez
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2168813da0
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Add help string | Fix emulator CC to not conflict with --vpi
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2020-08-21 14:07:32 -07:00 |
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abejgonzalez
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c9791ccbdf
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Update docs | Revert/Update emulator.cc
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2020-08-21 12:06:18 -07:00 |
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abejgonzalez
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425b8ce850
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Add support for multi-threaded verilator
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2020-08-20 23:37:17 -07:00 |
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Zitao Fang
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b0b09870dd
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2-stage core passed all tests
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2020-08-17 21:11:44 -07:00 |
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Zitao Fang
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84359abd19
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Isolated master adapter's TileLink valid signals from the core
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2020-08-16 16:07:38 -07:00 |
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Zitao Fang
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97f595f415
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1-stage passed all tests
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2020-08-16 15:41:44 -07:00 |
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Zitao Fang
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f6992c61c8
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5-stage CPU passed all tests
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2020-08-15 00:20:47 -07:00 |
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