Fix Typos

This commit is contained in:
Jerry Zhao
2020-09-07 11:36:37 -07:00
parent ab21c53a42
commit 7ed02a7d38
3 changed files with 10 additions and 10 deletions

View File

@@ -31,8 +31,8 @@ class TestHarness(implicit val p: Parameters) extends Module with HasHarnessSign
val success = Output(Bool())
})
val ldut = LazyModule(p(BuildTop)(p)).suggestName("chiptop")
val dut = Module(ldut.module)
val lazyDut = LazyModule(p(BuildTop)(p)).suggestName("chiptop")
val dut = Module(lazyDut.module)
io.success := false.B
val harnessClock = clock
@@ -42,7 +42,7 @@ class TestHarness(implicit val p: Parameters) extends Module with HasHarnessSign
// dutReset assignment can be overridden via a harnessFunction, but by default it is just reset
val dutReset = WireDefault(if (p(GlobalResetSchemeKey).pinIsAsync) reset.asAsyncReset else reset)
ldut match { case d: HasTestHarnessFunctions =>
lazyDut match { case d: HasTestHarnessFunctions =>
d.harnessFunctions.foreach(_(this))
ApplyHarnessBinders(this, d.lazySystem, p(HarnessBinders), d.portMap.toMap)
}

View File

@@ -48,7 +48,7 @@ class TutorialMMIOConfig extends Config(
new chipyard.config.AbstractConfig
)
// // Tutorial Phase 3: Integrate a SHA3 RoCC accelerator
// Tutorial Phase 3: Integrate a SHA3 RoCC accelerator
class TutorialSha3Config extends Config(
// Uncomment this line once you added SHA3 to the build.sbt, and cloned the SHA3 repo
// new sha3.WithSha3Accel ++