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Remove JTAG from firesim comfigs due to @(posedge ~clk) issue

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This commit is contained in:
Jerry Zhao
2020-09-03 23:53:51 -07:00
parent 4b30462320
commit 3258fd8db8
2 changed files with 5 additions and 2 deletions
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3
docs/Advanced-Concepts/Chip-Communication.rst
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@@ -130,7 +130,8 @@ Using the JTAG Interface
------------------------
The main way to use JTAG with a Rocket Chip based system is to instantiate the Debug Transfer Module (DTM)
and configure it to use a JTAG interface. The default Chipyard designs configure the DTM to use JTAG. you may attach OpenOCD and GDB to any of the default JTAG-enabled designs.
and configure it to use a JTAG interface. The default Chipyard designs instantiate the DTM and configure it
to use JTAG. You may attach OpenOCD and GDB to any of the default JTAG-enabled designs.
Debugging with JTAG
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

4
generators/firechip/src/main/scala/TargetConfigs.scala
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@@ -88,7 +88,9 @@ class WithFireSimConfigTweaks extends Config(
// Optional: Removing this will require using an initramfs under linux
new testchipip.WithBlockDevice ++
// Required*: Scale default baud rate with periphery bus frequency
new chipyard.config.WithUART(BigInt(3686400L))
new chipyard.config.WithUART(BigInt(3686400L)) ++
// Required: Do not support debug module w. JTAG until FIRRTL stops emitting @(posedge ~clock)
new chipyard.config.WithNoDebug
)
/*******************************************************************************