Commit Graph
468 Commits
Author SHA1 Message Date
Jerry Zhao 489ae695fc Add tile-resetter to all designs 2020-10-01 10:19:43 -07:00
Zitao Fang 6c33672c66 Bump Sodor submodule after merge 2020-10-01 10:08:39 -07:00
Albert Magyar 2f5790d611 Add model multi-threading annotations (ignored by default) to FireChip 2020-09-30 23:32:49 -07:00
Zitao Fang ef03a5efe0 Bump testchipip 2020-09-30 14:36:45 -07:00
David Biancolin ebfe3103a4 [clocks] IdealizedPll -> DividerOnlyClockGenerator 2020-09-29 17:33:49 -07:00
David Biancolin 5b414f5829 [clocks] Emit frequency summary for divider-only PLL model 2020-09-29 16:59:37 -07:00
David Biancolin a6ce850391 [clocks] ClockDividerN: make first output edge occur on first input edge 2020-09-29 16:19:05 -07:00
Zitao Fang 2aac38b4c8 Fix CI bug 2020-09-27 23:15:10 -07:00
Zitao Fang f7407709d2 Attempt to fix CI (2) 2020-09-25 21:31:12 -07:00
Zitao Fang 751c0c300e Remove comments 2020-09-25 20:49:18 -07:00
Zitao Fang 5243ee2a35 Add HTIF args back to emulator.cc 2020-09-25 20:36:07 -07:00
David Biancolin b76972d34b Merge remote-tracking branch 'origin/dev' into diplomatic-clocks-pll-redux 2020-09-25 11:02:51 -07:00
David Biancolin 67145c6ccd [clocking] Fix FireSim clock look up 2020-09-25 10:05:28 -07:00
David Biancolin 1b3514f95f [clocks] Specify a default frequency for TraceGen 2020-09-25 10:03:46 -07:00
David Biancolin 7b8a954d04 [firechip] Rework FireSim clocking to be more similar to default CY targets 2020-09-24 23:32:07 -07:00
David Biancolin cc949aadab [clocking] Address some of Colin's PR comments 2020-09-24 23:28:47 -07:00
David Biancolin f6989a1968 [clocks] Use the periphery frequency as the default 2020-09-24 23:24:08 -07:00
David Biancolin 96bf702c3b [clocks] Factor out the PLL calculations into their own class 2020-09-24 23:23:11 -07:00
Zitao Fang 6641c1f983 Attempt to fix CI 2020-09-24 22:42:49 -07:00
David Biancolin 84195d28bb [clocks] Don't override existing take frequency if present. 2020-09-23 15:29:52 -07:00
Zitao Fang a02700a1d4 Add documentation for sodor 2020-09-18 23:14:47 -07:00
Zitao Fang 0c8771c35e Merge branch 'dev' of github.com:ucb-bar/chipyard into sodor-integrate 2020-09-18 22:33:42 -07:00
Zitao Fang a43400acb9 Update CI 2020-09-18 15:36:33 -07:00
David Biancolin f36183d236 [clocks] Update AssignerKey name and comment 2020-09-18 11:28:31 -07:00
Jerry Zhao b9622c5132 Merge remote-tracking branch 'origin/dev' into serial-tl 2020-09-18 01:00:13 -07:00
David Biancolin ad147ec7f2 [clocks] Remove dealiaser and node injector until they are needed 2020-09-17 11:43:39 -07:00
David Biancolin 0f33ea3999 [clocks] Stringly specified clock frequencies; DRY out schemes 2020-09-17 11:41:05 -07:00
David Biancolin 6a26a350ee [clocks] Update dealiaser based on feedback 2020-09-17 11:33:26 -07:00
David Biancolin cfa7e30d95 [clocks] Fix comment in ClockDividerN 2020-09-17 11:32:51 -07:00
David Biancolin b8d3e4a66d Update Idealized PLL config 2020-09-16 16:30:25 -07:00
David Biancolin 8e4dedcecf Remove require guard on divided configs 2020-09-16 16:30:00 -07:00
David Biancolin 895bacea98 WIP - Simple divider-only PLL generation flow 2020-09-16 16:00:26 -07:00
Jerry Zhao 269af01a70 Bump testchipip 2020-09-16 13:51:33 -07:00
Jerry Zhao 36ccb12560 Bump testchipip 2020-09-16 10:29:03 -07:00
Zitao Fang 1543acfacd Merge branch 'dev' of github.com:ucb-bar/chipyard into sodor-integrate 2020-09-14 23:55:05 -07:00
Zitao Fang 642441e0a2 Replaced memory and fixed 3-stage single port arbiter 2020-09-14 23:54:52 -07:00
Jerry Zhao 0d8e87126c Deprecate support for on-chip SerialAdapter 2020-09-14 19:43:32 -07:00
Jerry Zhao f9cc1dc2c2 Merge remote-tracking branch 'origin/dev' into serial-tl 2020-09-14 19:35:43 -07:00
Jerry Zhao 10625a3a6c Undo regression in iocells flexibility 2020-09-14 13:27:31 -07:00
Jerry ZhaoandGitHub 16c80112a7 Merge pull request #670 from ucb-bar/harness-refactor
Split IOBinders into IOBinders and HarnessBinders | punch out clocks to harness for simwidgets and bridges
2020-09-14 12:45:46 -07:00
Zitao Fang 5506f77679 Add CircleCI check and update Sodor config 2020-09-14 09:14:57 -07:00
Jerry Zhao 6c5bce5430 Support Tilelink over serial 2020-09-13 11:59:16 -07:00
Jerry Zhao d2b42cee2c Bump testchipip 2020-09-12 23:31:54 -07:00
Jerry Zhao a5385c0a54 Update testchipip/icenet to use rocket-chip Located API 2020-09-11 00:02:07 -07:00
Zitao Fang 15d53e2cda Bump to the latest Rocket 2020-09-09 15:12:37 -07:00
Jerry Zhao facef464e6 Update BridgeBinders | fix runtime HarnessBinder port type checks 2020-09-09 00:15:02 -07:00
Jerry Zhao 8f9574fd79 Clean up passing ports from IOBinders to HarnessBinders 2020-09-08 22:30:17 -07:00
Jerry Zhao 11a9ad2428 Address code review comments 2020-09-08 15:52:09 -07:00
Jerry Zhao 7ed02a7d38 Fix Typos 2020-09-07 11:36:37 -07:00
Zitao Fang fb7804070c Merge branch 'dev' of github.com:ucb-bar/chipyard into sodor-integrate 2020-09-06 23:09:50 -07:00