* Use published rocketchip
* Simulator works!
* Gitignore was masking csrc
* Fix broken submodules
* Update gitignore
* Fix things up
* Some more cleanup
* Clean up so that using maven works
* Incorporate feedback
* Oops
* Add workaround for some of csrc
* Forgot dtm and jtag
* Make name better and add comment
* Extraneous comment
* Fix includes.
After running a clean build, I realized old build state was masking this
problem. verisim/csrc needs to be in the include path until we find a more
permanent solution to our problem.
* Add target to generate verilator-specific files.
* Ignore DS_Store
* Generate bootrom from testchipip
* Oops
* Add extraneous rocket-dsptools reference
bug using verilator, make the whitespace consistend in
Makefrag-verilator, explicitly name the verilog sources to match vsim,
and update verisim/Makefile to use the new source variable names
