wu-arch/chipyard
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

update verilator so that plusarg_reader works

Browse Source
This commit is contained in:
Howard Mao
2017-07-20 20:19:02 +00:00
parent fae57b6daa
commit ada96f3724
3 changed files with 2 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
verisim/Makefile
View File

@@ -69,4 +69,4 @@ $(sim_debug): $(model_mk_debug) $(sim_csrcs)
$(MAKE) VM_PARALLEL_BUILDS=1 -C $(build_dir)/$(long_name).debug -f V$(MODEL).mk
clean:
rm -rf generated-src
rm -rf generated-src ./simulator-*

2
verisim/Makefrag-verilator
View File

@@ -1,5 +1,5 @@
# Build and install our own Verilator, to work around versionining issues.
VERILATOR_VERSION=3.884
VERILATOR_VERSION=3.904
VERILATOR_SRCDIR=verilator/src/verilator-$(VERILATOR_VERSION)
INSTALLED_VERILATOR=$(abspath verilator/install/bin/verilator)
$(INSTALLED_VERILATOR): $(VERILATOR_SRCDIR)/bin/verilator