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  • 6641c1f983 Attempt to fix CI Zitao Fang 2020-09-24 22:42:49 -07:00
  • 84195d28bb [clocks] Don't override existing take frequency if present. David Biancolin 2020-09-23 15:29:52 -07:00
  • 023d8096a9 Merge pull request #677 from ucb-bar/smartelf2hex-fix Jerry Zhao 2020-09-22 17:04:45 -07:00
  • d5660c01f3 Bump esp-isa-sim for loadmem-fix add TLS segments to smartelf2hex Jerry Zhao 2020-09-22 12:58:34 -07:00
  • 6c297e3179 Fix smartelf2hex.sh creating files 64x the minimum size Jerry Zhao 2020-09-22 11:08:52 -07:00
  • ae5fb8470b Remove unnecessary CI tests Zitao Fang 2020-09-19 10:27:20 -07:00
  • a02700a1d4 Add documentation for sodor Zitao Fang 2020-09-18 23:14:47 -07:00
  • 56d1d5b500 Fix CI errors Zitao Fang 2020-09-18 22:42:19 -07:00
  • 0c8771c35e Merge branch 'dev' of github.com:ucb-bar/chipyard into sodor-integrate Zitao Fang 2020-09-18 22:33:42 -07:00
  • a43400acb9 Update CI Zitao Fang 2020-09-18 15:36:14 -07:00
  • ba05b32f9c Merge pull request #673 from ucb-bar/serial-tl Jerry Zhao 2020-09-18 15:30:04 -07:00
  • 382cefcee0 Merge pull request #89 from ucb-bar/support-plusargs Jerry Zhao 2020-09-18 13:28:31 -07:00
  • f36183d236 [clocks] Update AssignerKey name and comment David Biancolin 2020-09-17 12:17:02 -07:00
  • bbf941c865 Bump Firesim Jerry Zhao 2020-09-18 10:43:58 -07:00
  • aa355c7c1a Bump firesim Jerry Zhao 2020-09-18 10:41:59 -07:00
  • b9622c5132 Merge remote-tracking branch 'origin/dev' into serial-tl Jerry Zhao 2020-09-17 13:42:24 -07:00
  • 9135cda959 Bypassing AON for system.reset. Using reset_core in ArtyShell test harness, which is derived from Xilinx reset IP block's mb_reset. Changing dutReset to same reset_core. James Dunn 2020-09-17 13:43:28 -07:00
  • 4a5c75fcf8 Add explicit naming of IOs generated by generateIOFromSignal Jerry Zhao 2020-09-17 13:21:32 -07:00
  • ad147ec7f2 [clocks] Remove dealiaser and node injector until they are needed David Biancolin 2020-09-17 11:39:01 -07:00
  • 0f33ea3999 [clocks] Stringly specified clock frequencies; DRY out schemes David Biancolin 2020-09-17 11:37:56 -07:00
  • 6a26a350ee [clocks] Update dealiaser based on feedback David Biancolin 2020-09-17 11:33:26 -07:00
  • cfa7e30d95 [clocks] Fix comment in ClockDividerN David Biancolin 2020-09-17 11:32:51 -07:00
  • 43f746edb6 Merge pull request #675 from ucb-bar/faster-ci Jerry Zhao 2020-09-16 22:55:27 -07:00
  • b8d3e4a66d Update Idealized PLL config David Biancolin 2020-09-16 16:30:25 -07:00
  • 8e4dedcecf Remove require guard on divided configs David Biancolin 2020-09-16 16:30:00 -07:00
  • 895bacea98 WIP - Simple divider-only PLL generation flow David Biancolin 2020-08-24 11:01:29 -07:00
  • 6874308981 Address review comments Jerry Zhao 2020-09-16 15:27:43 -07:00
  • 269af01a70 Bump testchipip Jerry Zhao 2020-09-16 12:06:36 -07:00
  • 36ccb12560 Bump testchipip Jerry Zhao 2020-09-16 10:29:03 -07:00
  • aa8b7c15ec Reduce CI redundancy by grouping builds Jerry Zhao 2020-09-14 23:04:58 -07:00
  • f1b40d51af Connected clocks | Exposed Master TL port abejgonzalez 2020-09-15 12:58:58 -07:00
  • 1543acfacd Merge branch 'dev' of github.com:ucb-bar/chipyard into sodor-integrate Zitao Fang 2020-09-14 23:55:05 -07:00
  • 642441e0a2 Replaced memory and fixed 3-stage single port arbiter Zitao Fang 2020-09-14 23:54:52 -07:00
  • 0d8e87126c Deprecate support for on-chip SerialAdapter Jerry Zhao 2020-09-14 19:41:02 -07:00
  • 847f72eca0 Support plusarg_reader blackbox in the harness Jerry Zhao 2020-09-14 19:39:44 -07:00
  • f9cc1dc2c2 Merge remote-tracking branch 'origin/dev' into serial-tl Jerry Zhao 2020-09-14 19:35:43 -07:00
  • 23a199eccf Merge pull request #674 from ucb-bar/iocells-fix Jerry Zhao 2020-09-14 19:32:37 -07:00
  • 1435f09ce6 Merge pull request #88 from ucb-bar/iocell-fix Jerry Zhao 2020-09-14 19:28:36 -07:00
  • 10625a3a6c Undo regression in iocells flexibility Jerry Zhao 2020-09-14 13:27:31 -07:00
  • 31590a7948 Undo regression in iocell flexibility Jerry Zhao 2020-09-14 13:24:44 -07:00
  • 16c80112a7 Merge pull request #670 from ucb-bar/harness-refactor Jerry Zhao 2020-09-14 12:45:46 -07:00
  • e6e1ed85f2 Merge pull request #86 from ucb-bar/iocell-params Jerry Zhao 2020-09-14 12:00:33 -07:00
  • d06d8cc16c - FoundryPadsYaml would not parse yaml - Made separate case class for data - Now parses - Fails later with UnknownType in firrt compiler - Fixed similar parsing problem with PadPlacement chick 2020-09-14 09:32:18 -07:00
  • 5506f77679 Add CircleCI check and update Sodor config Zitao Fang 2020-09-14 09:14:57 -07:00
  • 72c0f4b3d3 Add GPIO Overlay abejgonzalez 2020-09-13 16:37:20 -07:00
  • 6c5bce5430 Support Tilelink over serial Jerry Zhao 2020-09-13 11:59:16 -07:00
  • be0c041232 Bump Firesim Jerry Zhao 2020-09-13 06:36:37 +00:00
  • d2b42cee2c Bump testchipip Jerry Zhao 2020-09-12 23:31:54 -07:00
  • 69bf39bf13 Added more overlays | Closer to bringup platform abejgonzalez 2020-09-12 18:18:13 -07:00
  • 67de39e957 Refactor tapeout for Chisel 3.4, Firrtl 1.4 - Remove clk package based on discussion with Colin - Annotations need to be refactored to using latest API - Generally that involves making annos generated by a anonymous ChiselAnnotation - The chisel annotations will use RunFirrtlTransform to queue up its associated transform - Chisel annotation provieds toFirrtl to generate Firrtl form of annotation - Usages of unapply on firrtl annotations cannot use generic unapply(target, transform, data) which has been eliminated - Have transforms use with DependencyAPIMigration to avoid deprecated forms - Added some 'see License comments - TechnologyLocation section of AddIOPadsSpec does not currently run because there is no content for it. - Added some tests for annotation serialization here chick 2020-09-11 17:06:19 -07:00
  • 382e5f1ae8 Add forgotten file abejgonzalez 2020-09-11 17:02:22 -07:00
  • e98a0f172f Connected UART nicely abejgonzalez 2020-09-11 16:55:25 -07:00
  • a5385c0a54 Update testchipip/icenet to use rocket-chip Located API Jerry Zhao 2020-09-10 23:20:37 -07:00
  • e4cd2b01fe This is mess clean it up chick 2020-09-10 14:35:10 -07:00
  • 15d53e2cda Bump to the latest Rocket Zitao Fang 2020-09-09 15:12:37 -07:00
  • facef464e6 Update BridgeBinders | fix runtime HarnessBinder port type checks Jerry Zhao 2020-09-09 00:15:02 -07:00
  • 8f9574fd79 Clean up passing ports from IOBinders to HarnessBinders Jerry Zhao 2020-09-08 21:52:50 -07:00
  • 56eead4053 NOT WORKING: VCU118 Commit abejgonzalez 2020-09-08 17:04:56 -07:00
  • 11a9ad2428 Address code review comments Jerry Zhao 2020-09-08 15:52:09 -07:00
  • 2580073d75 Comment cleanup abejgonzalez 2020-09-07 15:30:21 -07:00
  • c49eef3224 Small cleanup to CY DigitalTop | Move E300 configs to unique folder abejgonzalez 2020-09-07 15:26:30 -07:00
  • b4e270219d Bump firesim Jerry Zhao 2020-09-07 14:02:31 -07:00
  • a8083aa570 First pass at fpga-shells with IOBinders abejgonzalez 2020-09-07 11:47:37 -07:00
  • 7ed02a7d38 Fix Typos Jerry Zhao 2020-09-07 11:36:37 -07:00
  • fb7804070c Merge branch 'dev' of github.com:ucb-bar/chipyard into sodor-integrate Zitao Fang 2020-09-06 23:09:50 -07:00
  • 11dcd71a48 Clean up 5-stage instruction fetch Zitao Fang 2020-09-06 23:06:00 -07:00
  • b6a54ead59 Merge pull request #669 from ucb-bar/local-fpga-arty-abe Abraham Gonzalez 2020-09-06 21:00:57 -07:00
  • 24b39da31c Merge pull request #672 from ucb-bar/htif-dts-fix Jerry Zhao 2020-09-05 17:40:48 -07:00
  • 927244bf2e DTM only supports HTIF in DMI mode Jerry Zhao 2020-09-05 11:16:55 -07:00
  • ab21c53a42 Add documentation on HarnessBinders Jerry Zhao 2020-09-04 23:49:40 -07:00
  • 9eb88c55fc Fix FireSim submodule Jerry Zhao 2020-09-04 23:07:23 -07:00
  • b613c14f1c Fix remaining HarnessBinders bugs Jerry Zhao 2020-09-04 20:03:12 -07:00
  • 1fa1b6d57f Small makefile cleanup abejgonzalez 2020-09-04 19:03:26 -07:00
  • 8eb807a2fd Use DigitalTop in Platform | Use Chipyard BootRom abejgonzalez 2020-09-04 18:55:56 -07:00
  • 0f50e4d118 Split IOBinders into IOBinders and Harness Binders | punch out clocks to harness for simwidgets and bridges Jerry Zhao 2020-09-04 13:35:05 -07:00
  • 990362933d Simple makefile variable fix to allow make mcs James Dunn 2020-09-04 14:16:42 -07:00
  • ba681676f3 Clean up IOCell types and parameterization Jerry Zhao 2020-09-04 13:29:31 -07:00
  • 178a0e38b5 Merge pull request #664 from ucb-bar/fix-debug-ios Jerry Zhao 2020-09-04 09:47:59 -07:00
  • 3258fd8db8 Remove JTAG from firesim comfigs due to @(posedge ~clk) issue Jerry Zhao 2020-09-03 23:53:51 -07:00
  • 5a885fdcfd Delete old makefiles | Full switch to CY make system abejgonzalez 2020-09-03 21:28:05 -07:00
  • 0656c5da4f First pass on using CY make system abejgonzalez 2020-09-03 20:29:19 -07:00
  • 942d881c60 Merge pull request #667 from ucb-bar/fast-find Jerry Zhao 2020-09-03 13:47:09 -07:00
  • 23e4c22a44 Don't run find in base_dir to avoid slow filesystem search Jerry Zhao 2020-09-02 23:52:55 -07:00
  • 0995f1b04b UCode passed all tests Zitao Fang 2020-09-02 21:25:36 -07:00
  • 4b30462320 Change default IO set to JTAG+Serial, instead of JTAG+DMI Jerry Zhao 2020-09-02 20:19:27 -07:00
  • 3b6d584672 Adding submodule update script for FPGA tools. James Dunn 2020-09-02 13:27:31 -07:00
  • a8834c7766 First draft of local FPGA support, targeting ARTY. Able to build verilog and bitfile for Rocket + Chipyard GCD example. To test, add GCD mixin to fpga/src/main/scala/arty/Config.scala, run make -f Makefile.e300artydevkit verilog and make -f Makefile.e300artydevkit mcs in fpga directory. Output will be in fpga/build. James Dunn 2020-09-02 12:48:44 -07:00
  • bb1d0a10ae Stage 3 (single port) passed all tests Zitao Fang 2020-08-31 18:00:40 -07:00
  • c8448cc3e1 Bore out a bus clock to drive DebugIO from ChipTop Jerry Zhao 2020-08-30 18:10:52 -07:00
  • 5c5af7bfad Stage 3 passed all tests Zitao Fang 2020-08-28 18:37:47 -07:00
  • 17239c56f8 Update AddIOCells.debug comment Jerry Zhao 2020-08-28 14:36:09 -07:00
  • 20013d1348 Add DTM based bringup to regressions Jerry Zhao 2020-08-28 14:21:24 -07:00
  • 5705f2645f Bump toolchains Jerry Zhao 2020-08-28 14:21:03 -07:00
  • 27b78f4de2 Only punch realistic subset of DebugIO through chiptop Jerry Zhao 2020-08-27 23:48:01 -07:00
  • 98c4e6c711 Merge pull request #663 from ucb-bar/marshal-branch-check Jerry Zhao 2020-08-28 09:50:03 -07:00
  • 933df4e05c Whitelist firemarshal's dev branch for commit-on-master check Jerry Zhao 2020-08-27 23:27:24 -07:00
  • ee1ce1141c Merge pull request #614 from ucb-bar/diplomatic-clocks Jerry Zhao 2020-08-27 21:09:54 -07:00
  • 239b6b6e09 Bump testchipip Jerry Zhao 2020-08-27 13:00:43 -07:00
  • 5a25ee5206 Bump Firesim for new AGFIs Jerry Zhao 2020-08-27 08:08:08 +00:00
  • e275a45890 Address PR comments Jerry Zhao 2020-08-24 17:51:48 -07:00