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Author SHA1 Message Date
John Wright
acd76e5410 Adding barstools to separate the top from harness and to generate the 
memories as external modules, which makes VLSI flows easier to plug in.
 2019-02-13 21:13:08 -08:00
James Dunn
9d505d6063 Fixed index offset in mask port mapping. (#38) 
Fixed index offset in mask port mapping.
 2019-02-13 15:17:12 -08:00
John Wright
1f58ea1e14 Style/Comments from review of #35 2019-02-13 10:15:51 -08:00
John Wright
efd2f09b21 Naming consistency (memMode -> memFormat) 2019-02-13 10:15:51 -08:00
John Wright
f0c7bab3ea Use the correct 'magic values' for the port names 
Ensure backwards compatiblity by using -m for MDF input and -n for conf
input. Also fix the naming scheme for memory ports.
 2019-02-13 10:15:51 -08:00
John Wright
d861fdd95c Don't run DCE && Profit 2019-02-13 10:15:51 -08:00
John Wright
12842cb3a7 Add MemConf and change MacroCompiler to use a conf file instead of MDF JSON 2019-02-13 10:15:51 -08:00
John Wright
79b8fd324b This compiles and works correctly, but is kind of hacky, and will break as soon as any additional external/blackbox modules are added to the test harness. The test harness should detect external modules and not rename them instead of what is happening here. 2019-02-13 10:15:51 -08:00
John Wright
c8efc5e88b Refactor the harness generation; use upstream arguments and passes where appropriate 2019-02-13 10:15:51 -08:00
Paul Rigge
22e6d9c5d4 Fix repl-seq-mem 2019-02-13 10:15:51 -08:00
Paul Rigge
7bbf7f00f6 Run transforms in slightly different order 
Also, don't rename TestHarness.
 2019-02-13 10:15:51 -08:00
Paul Rigge
801abd98bb Fix null pointer exception in options parser 2019-02-13 10:15:51 -08:00
Paul Rigge
f310d45381 Refactor barstools for new versions of things. 
- No handlebars (not being published for Scala 2.12)
- Update for new annotations APIs

Bump sbt-dependency-graph to 0.9.2 for this scala version
 2019-02-13 10:15:51 -08:00
Edward Wang
4727d475c7 Add options to force certain memories to lib or synflops 2019-02-06 12:40:53 -08:00
Edward Wang
d1c1b3fba6 Overhaul CompilerMode parsing 2019-02-06 12:40:53 -08:00
Abraham Gonzalez
d01e38ef8a Re-add line on updated Makefrag 2019-02-03 20:17:45 -08:00
Howard Mao
fc06c909c0 fix README section on adding new submodules 2019-01-28 14:31:13 -08:00
Paul Rigge
de1ab1d8a9 Merge pull request #42 from grebe/axiPWM 
Add an AXI4 flavor of PWM peripheral.
 2019-01-25 14:52:09 -08:00
Paul Rigge
8cf06db45c Add an AXI4 flavor of PWM peripheral. 
Also closes #41.
 2019-01-24 17:13:40 -08:00
John Wright
304592f61e Fixes FIRRTL compilation bug in testchipip unit tests 2019-01-18 00:04:04 -08:00
Edward Wang
d48587b671 Update project-template for testchipip master 2018-11-02 12:05:36 -07:00
edwardcwang
74ca2bc491 Remove deprecated run-main 2018-10-31 13:47:28 -07:00
Albert Ou
cd82131748 verisim: Add verilator-harness.cc from testchipip/csrc 
This fixes #35 and matches firechip.

238afa543f
49b7982c82
 2018-10-05 09:24:35 -07:00
Albert Ou
048492e54c mk: Ensure that FIRRTL jar has updated timestamp 
SBT does not replace $(ROCKETCHIP_DIR)/firrtl/utils/bin/firrtl.jar if
compilation produces the same results.
 2018-10-02 17:43:51 -07:00
Albert Ou
220aeea4c8 Bump rocket-chip 
- Update Scala version to 2.12.4; work around SBT multi-project idiosyncrasies
- Remove HasSystemErrorSlave
 2018-09-29 13:30:07 -07:00
Howard Mao
a3684d01dd use build.sbt instead of jar files to collect packages 2018-05-03 17:09:59 -07:00
edwardcwang
93bf7895be Fix corner case in compiling a small mem using a large lib (#32) 
* Refactor bit pairs calculation into a separate function

* Minor clarifications

* Clarify MacroCompilerSpec helpers

* Add SmallTagArrayTest test

* Fix corner case in compiling a small mem using a large lib
 2018-04-26 10:33:55 -07:00
Howard Mao
4c8c6e29f0 update rocket-chip again 2018-04-18 17:13:07 -07:00
olix86
b599514934 Update Makefrag-verilator 
Changed verilator version from 3.904 to 3.920, which fixes a bug that prevented the default example to compile correctly
 2018-04-17 17:11:30 -07:00
Howard Mao
728251a922 fix bootrom race condition 2018-04-17 16:47:48 -07:00
Howard Mao
7dc738a831 DualCoreConfig should be actually dual core 2018-04-17 16:06:44 -07:00
Howard Mao
b8f369a4bd switch to rebased testchipip branch 2018-04-17 15:56:22 -07:00
Howard Mao
7e70e3525f move bootrom to testchipip 2018-04-17 15:13:47 -07:00
Howard Mao
f1a55d531e bump rocket-chip to April commit 2018-04-17 11:59:45 -07:00
Howard Mao
28539dc562 bump rocket-chip to March commit 2018-04-16 19:33:51 -07:00
edwardcwang
f7634b82cd Include macro compiler JAR compilation instructions 2018-03-21 14:50:18 -07:00
Howard Mao
d88c2fa84f add regression tests to makefile 2018-02-23 13:48:45 -08:00
Howard Mao
073c16961e make sure annotations are generated and carried through to verilog elaboration 2018-02-23 11:50:33 -08:00
Howard Mao
1dfe9b1c9f bump rocket-chip and fix deprecated code in testchipip.GeneratorApp 2018-02-23 11:46:40 -08:00
Howard Mao
eaff48e312 fix issue #20: PWMConfig elaboration error due to requirement failure 2018-02-23 10:54:05 -08:00
Howard Mao
e3f05011c1 bugfix for verilator test harness 2018-02-23 10:35:01 -08:00
Edward Wang
1ccd8f6dbc Bump mdf to match master 2018-02-16 16:03:08 -08:00
Adam Izraelevitz
79c8c283cc Add memory compiler to macros (#29) 
* Add memory compiler to macros

* Removed weird spacing

* Make sramcompiler width/depth range inclusive

* Added sramcompiler test
 2018-02-16 16:01:10 -08:00
Howard Mao
080fdb835e fix testchipip SimSerial csrc for new htif_t constructor 2018-01-29 10:44:16 -08:00
Donggyu Kim
ed13397967 changes for new rocket-chip 2018-01-15 16:07:44 -08:00
edwardcwang
8a30579a3e Support firrtl output in command line for MacroCompiler (#28) 
* Use the given port prefix (fix a bug preventing two unit tests from passing)
* Support firrtl output in addition to Verilog
 2017-12-04 15:12:42 -08:00
Howard Mao
269660bbfe take pingd and nic-loopback out of Makefile 2017-11-30 20:50:01 -08:00
Howard Mao
e4a4046375 get RV32 working 2017-11-03 18:00:27 -07:00
Howard Mao
52068497c4 changes to block device memory map 2017-10-26 13:27:20 -07:00
Howard Mao
2223932bd2 disable compressed instructions in bootrom 2017-10-26 13:26:57 -07:00