Commit Graph

217 Commits

Author SHA1 Message Date
chick
caa1467d87 Reformat all scala files in tapeout
- Mostly this reformat comments and large argument lists to classes and methods
2021-02-03 17:51:30 -08:00
chick
68c3425493 Reformat all scala files in macros
- Mostly this reformat comments and large argument lists to classes and methods
2021-02-03 17:50:36 -08:00
chick
93f86a5bc6 Reformat all scala files in iocells
- Mostly this reformat comments and large argument lists to classes and methods
2021-02-03 17:49:14 -08:00
chick
19e51f3df5 Make the directory structure match the packages
All tests run as they did prior to the changes
2021-02-03 17:46:12 -08:00
Chick Markley
0faa16d330 Merge pull request #94 from ucb-bar/get-rid-of-scala-style-checkers
Get rid of scalastyle checkers.
2021-02-02 09:52:00 -08:00
chick
1761d500f3 Get rid of scalastyle checkers.
These are outdated and not used by the rest of the chisel family.
Add the scalafmt file that is used to fix code formatting. This will be used to regularize the code.
That work will be done by attrition.
2021-02-01 10:00:52 -08:00
Abraham Gonzalez
8c93874524 Merge pull request #87 from ucb-bar/firrtl-1.4-remove-clk-stuff
Move to Chisel 3.4, Firrtl 1.4, remove .clk and .pad stuff
2020-12-13 10:59:20 -07:00
abejgonzalez
689ebdc06e Add invalidates=false to RetimeTransform 2020-12-11 15:01:17 -08:00
abejgonzalez
26dce446ea Generate LowFirrtl for Retime tests 2020-12-11 14:51:43 -08:00
abejgonzalez
62f311654a Fix ResetInv test 2020-12-11 14:11:08 -08:00
David Biancolin
15fa68b3a4 Bump MDF for updated scala version 2020-12-11 03:55:25 +00:00
abejgonzalez
3a29f53572 Use stable dep. versions | Small bumps/cleanup 2020-11-30 21:11:24 -08:00
abejgonzalez
fa699af026 Add missing dependency to put AvoidExtModuleCollisions before ReplSeqMem 2020-11-27 17:34:16 -08:00
abejgonzalez
9be550e23d Bump to new dep. API | Automatically avoid renaming ExtMod's and circuit top mod 2020-11-25 20:50:54 -08:00
abejgonzalez
845af06b15 Merge remote-tracking branch 'origin/master' into firrtl-1.4-remove-clk-stuff 2020-11-19 16:59:49 -08:00
Chick Markley
8e5757b5ce Merge pull request #92 from sifive/chisel34
Update MacroCompiler for Chisel 3.4 / FIRRTL 1.4
2020-11-13 11:43:02 -08:00
Tim Snyder
20d370be49 Merge branch 'firrtl-1.4-remove-clk-stuff' into chisel34 2020-10-23 13:08:48 -05:00
Tim Snyder
446cb84cbf fixup! Update MacroCompiler for Chisel 3.4
Need to collect the annotations into a Seq.
Also updated the macros project tests.
2020-10-23 18:02:42 +00:00
Tim Snyder
aca4bd579f update build.sbt for Chisel3.4/FIRRTL1.4 2020-10-23 18:01:06 +00:00
Tim Snyder
fc3a3eabff Update MacroCompiler for Chisel 3.4 2020-10-21 21:08:51 +00:00
chick
a1dfd4f774 Remove all of the PadStuff 2020-09-30 15:04:56 -07:00
chick
8903c04c2d - fix call to ceilLog2 in macros 2020-09-29 10:59:48 -07:00
chick
1a82c082b3 - Make transfrorms run in as close to same order as before
- Fix parsing of PadPlacement JSON
2020-09-29 10:11:46 -07:00
chick
f51156bf1f - Fixed ResetNSpec 2020-09-28 15:34:36 -07:00
chick
0430403920 - Simplest way to make custom transforms run in same place as they did prior to Dependency API 2020-09-28 15:20:42 -07:00
Jerry Zhao
382cefcee0 Merge pull request #89 from ucb-bar/support-plusargs
Support plusarg_reader in TestHarness | explicitly name generated IOs
2020-09-18 13:28:31 -07:00
Jerry Zhao
4a5c75fcf8 Add explicit naming of IOs generated by generateIOFromSignal 2020-09-17 13:21:32 -07:00
Jerry Zhao
847f72eca0 Support plusarg_reader blackbox in the harness 2020-09-14 19:39:44 -07:00
Jerry Zhao
1435f09ce6 Merge pull request #88 from ucb-bar/iocell-fix
Undo regression in iocell flexibility
2020-09-14 19:28:36 -07:00
Jerry Zhao
31590a7948 Undo regression in iocell flexibility 2020-09-14 13:24:44 -07:00
Jerry Zhao
e6e1ed85f2 Merge pull request #86 from ucb-bar/iocell-params
Clean up IOCell types and parameterization
2020-09-14 12:00:33 -07:00
chick
d06d8cc16c - FoundryPadsYaml would not parse yaml
- Made separate case class for data
  - Now parses
  - Fails later with UnknownType in firrt compiler
- Fixed similar parsing problem with PadPlacement
2020-09-14 09:32:18 -07:00
chick
67de39e957 Refactor tapeout for Chisel 3.4, Firrtl 1.4
- Remove clk package based on discussion with Colin
- Annotations need to be refactored to using latest API
  - Generally that involves making annos generated by a anonymous ChiselAnnotation
  - The chisel annotations will use RunFirrtlTransform to queue up its associated transform
  - Chisel annotation provieds toFirrtl to generate Firrtl form of annotation
- Usages of unapply on firrtl annotations cannot use generic unapply(target, transform, data) which has been eliminated
- Have transforms use with DependencyAPIMigration to avoid deprecated `form`s
- Added some 'see License comments
- TechnologyLocation section of AddIOPadsSpec does not currently run because there is no content for it.
  - Added some tests for annotation serialization here
2020-09-11 17:06:19 -07:00
chick
e4cd2b01fe This is mess clean it up 2020-09-10 14:35:10 -07:00
Jerry Zhao
ba681676f3 Clean up IOCell types and parameterization 2020-09-04 13:29:31 -07:00
Jerry Zhao
f791073f02 Merge pull request #85 from ucb-bar/iocells_fix
Fix IOCells generation
2020-07-03 12:07:35 -07:00
Jerry Zhao
aa1c90c4cc Fix IOCells generation
* Fixes Bool wires matching both Reset and Bits
2020-06-30 13:33:06 -07:00
Abraham Gonzalez
7e6e19b8ad Merge pull request #82 from ucb-bar/fix-output-iocell
Fix direction of output enable in output io cell
2020-05-29 17:23:03 -07:00
Colin Schmidt
b1c1f01c90 Fix direction of output enable in output io cell 2020-05-29 15:09:45 -07:00
Albert Magyar
c4e5f66c5e Provide MidForm circuit to MacroCompilerTransform 2020-05-13 10:34:57 -07:00
Albert Magyar
757c39ac1c Change macrocompiler to support FIRRTL 1.3 -- not backwards compatible 2020-05-13 10:34:57 -07:00
Albert Magyar
acda0a3490 Changes to tapeout transforms to support FIRRTL 1.3 2020-05-13 10:34:57 -07:00
David Biancolin
e230e8cf3f Update IOCell gen to handle abstract and async reset (#79) 2020-04-17 22:05:48 -07:00
John Wright
db6776367c Merge pull request #78 from ucb-bar/iocells
Add IO cell models
2020-03-31 16:32:17 -07:00
John Wright
6638f5c77e More CR feedback, fix bug introduced in previous commit 2020-03-31 13:06:01 -07:00
John Wright
c043f344b8 Code review feedback 2020-03-30 19:15:19 -07:00
John Wright
bc3f8a42b3 Forgot to update the verilog modules 2020-03-30 13:50:27 -07:00
John Wright
62df79934e Remove type casts; use a tuple match instead 2020-03-30 13:10:00 -07:00
John Wright
a6731f6a5e Rename example -> generic 2020-03-30 12:33:44 -07:00
John Wright
f6057ff947 Allow naming, make the auto-clone IO method work 2020-03-18 22:25:08 -07:00