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Reformat all scala files in tapeout

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- Mostly this reformat comments and large argument lists to classes and methods
This commit is contained in:
chick
2021-02-03 17:51:30 -08:00
parent 68c3425493
commit caa1467d87
15 changed files with 163 additions and 135 deletions
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9
tapeout/src/main/scala/barstools/tapeout/transforms/AddSuffixToModuleNames.scala
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@@ -9,8 +9,7 @@ import firrtl.ir._
import firrtl.stage.Forms
import firrtl.stage.TransformManager.TransformDependency
case class KeepNameAnnotation(target: ModuleTarget)
extends SingleTargetAnnotation[ModuleTarget] {
case class KeepNameAnnotation(target: ModuleTarget) extends SingleTargetAnnotation[ModuleTarget] {
def duplicate(n: ModuleTarget) = this.copy(n)
}
@@ -21,8 +20,8 @@ case class ModuleNameSuffixAnnotation(target: CircuitTarget, suffix: String)
class AddSuffixToModuleNames extends Transform with DependencyAPIMigration {
override def prerequisites: Seq[TransformDependency] = Forms.LowForm
override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
override def prerequisites: Seq[TransformDependency] = Forms.LowForm
override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
override def optionalPrerequisiteOf: Seq[TransformDependency] = Forms.LowEmitters
override def invalidates(a: Transform): Boolean = false
@@ -37,7 +36,7 @@ class AddSuffixToModuleNames extends Transform with DependencyAPIMigration {
val excludeSet = state.circuit.modules.flatMap {
case e: ExtModule => Some(e.name)
case m if (m.name == state.circuit.main) => Some(m.name)
case _ => None
case _ => None
}.toSet
val renamer = { (name: String) => if (excludeSet(name)) name else name + suffix }

5
tapeout/src/main/scala/barstools/tapeout/transforms/AvoidExtModuleCollisions.scala
View File

@@ -14,7 +14,7 @@ case class LinkExtModulesAnnotation(mustLink: Seq[ExtModule]) extends NoTargetAn
class AvoidExtModuleCollisions extends Transform with DependencyAPIMigration {
override def prerequisites: Seq[TransformDependency] = Forms.HighForm
override def prerequisites: Seq[TransformDependency] = Forms.HighForm
override def optionalPrerequisites: Seq[TransformDependency] = Seq(Dependency[RemoveUnusedModules])
override def optionalPrerequisiteOf: Seq[TransformDependency] = {
Forms.HighEmitters :+ Dependency[ReplSeqMem]
@@ -24,10 +24,9 @@ class AvoidExtModuleCollisions extends Transform with DependencyAPIMigration {
def execute(state: CircuitState): CircuitState = {
val mustLink = state.annotations.flatMap {
case LinkExtModulesAnnotation(mustLink) => mustLink
case _ => Nil
case _ => Nil
}
val newAnnos = state.annotations.filterNot(_.isInstanceOf[LinkExtModulesAnnotation])
state.copy(circuit = state.circuit.copy(modules = state.circuit.modules ++ mustLink), annotations = newAnnos)
}
}

5
tapeout/src/main/scala/barstools/tapeout/transforms/ConvertToExtModPass.scala
View File

@@ -10,8 +10,7 @@ import firrtl.passes.memlib.ReplSeqMem
import firrtl.stage.Forms
import firrtl.stage.TransformManager.TransformDependency
case class ConvertToExtModAnnotation(target: ModuleTarget)
extends SingleTargetAnnotation[ModuleTarget] {
case class ConvertToExtModAnnotation(target: ModuleTarget) extends SingleTargetAnnotation[ModuleTarget] {
def duplicate(n: ModuleTarget) = this.copy(n)
}
@@ -20,7 +19,7 @@ case class ConvertToExtModAnnotation(target: ModuleTarget)
// otherwise it's left alone.
class ConvertToExtMod extends Transform with DependencyAPIMigration {
override def prerequisites: Seq[TransformDependency] = Forms.HighForm
override def prerequisites: Seq[TransformDependency] = Forms.HighForm
override def optionalPrerequisites: Seq[TransformDependency] = Seq.empty
override def optionalPrerequisiteOf: Seq[TransformDependency] = {
Forms.HighEmitters ++ Seq(Dependency[RemoveUnusedModules], Dependency[ReplSeqMem])

8
tapeout/src/main/scala/barstools/tapeout/transforms/EnumerateModules.scala
View File

@@ -23,10 +23,12 @@ class EnumerateModulesPass(enumerate: (Module) => Unit) extends Pass {
}
class EnumerateModules(enumerate: (Module) => Unit)
extends Transform with SeqTransformBased with DependencyAPIMigration {
extends Transform
with SeqTransformBased
with DependencyAPIMigration {
override def prerequisites: Seq[TransformDependency] = Forms.LowForm
override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
override def prerequisites: Seq[TransformDependency] = Forms.LowForm
override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
override def optionalPrerequisiteOf: Seq[TransformDependency] = Forms.LowEmitters
override def invalidates(a: Transform): Boolean = false

96
tapeout/src/main/scala/barstools/tapeout/transforms/Generate.scala
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@@ -13,130 +13,150 @@ trait HasTapeoutOptions { self: ExecutionOptionsManager with HasFirrtlOptions =>
parser.note("tapeout options")
parser.opt[String]("harness-o")
parser
.opt[String]("harness-o")
.abbr("tho")
.valueName("<harness-output>")
.foreach { x =>
tapeoutOptions = tapeoutOptions.copy(
harnessOutput = Some(x)
)
}.text {
}
.text {
"use this to generate a harness at <harness-output>"
}
parser.opt[String]("syn-top")
parser
.opt[String]("syn-top")
.abbr("tst")
.valueName("<syn-top>")
.foreach { x =>
tapeoutOptions = tapeoutOptions.copy(
synTop = Some(x)
)
}.text {
}
.text {
"use this to set synTop"
}
parser.opt[String]("top-fir")
parser
.opt[String]("top-fir")
.abbr("tsf")
.valueName("<top-fir>")
.foreach { x =>
tapeoutOptions = tapeoutOptions.copy(
topFir = Some(x)
)
}.text {
}
.text {
"use this to set topFir"
}
parser.opt[String]("top-anno-out")
parser
.opt[String]("top-anno-out")
.abbr("tsaof")
.valueName("<top-anno-out>")
.foreach { x =>
tapeoutOptions = tapeoutOptions.copy(
topAnnoOut = Some(x)
)
}.text {
}
.text {
"use this to set topAnnoOut"
}
parser.opt[String]("top-dotf-out")
parser
.opt[String]("top-dotf-out")
.abbr("tdf")
.valueName("<top-dotf-out>")
.foreach { x =>
tapeoutOptions = tapeoutOptions.copy(
topDotfOut = Some(x)
)
}.text {
}
.text {
"use this to set the filename for the top resource .f file"
}
parser.opt[String]("harness-top")
parser
.opt[String]("harness-top")
.abbr("tht")
.valueName("<harness-top>")
.foreach { x =>
tapeoutOptions = tapeoutOptions.copy(
harnessTop = Some(x)
)
}.text {
}
.text {
"use this to set harnessTop"
}
parser.opt[String]("harness-fir")
parser
.opt[String]("harness-fir")
.abbr("thf")
.valueName("<harness-fir>")
.foreach { x =>
tapeoutOptions = tapeoutOptions.copy(
harnessFir = Some(x)
)
}.text {
}
.text {
"use this to set harnessFir"
}
parser.opt[String]("harness-anno-out")
parser
.opt[String]("harness-anno-out")
.abbr("thaof")
.valueName("<harness-anno-out>")
.foreach { x =>
tapeoutOptions = tapeoutOptions.copy(
harnessAnnoOut = Some(x)
)
}.text {
}
.text {
"use this to set harnessAnnoOut"
}
parser.opt[String]("harness-dotf-out")
parser
.opt[String]("harness-dotf-out")
.abbr("hdf")
.valueName("<harness-dotf-out>")
.foreach { x =>
tapeoutOptions = tapeoutOptions.copy(
harnessDotfOut = Some(x)
)
}.text {
}
.text {
"use this to set the filename for the harness resource .f file"
}
parser.opt[String]("harness-conf")
parser
.opt[String]("harness-conf")
.abbr("thconf")
.valueName ("<harness-conf-file>")
.valueName("<harness-conf-file>")
.foreach { x =>
tapeoutOptions = tapeoutOptions.copy(
harnessConf = Some(x)
)
}.text {
}
.text {
"use this to set the harness conf file location"
}
}
case class TapeoutOptions(
harnessOutput: Option[String] = None,
synTop: Option[String] = None,
topFir: Option[String] = None,
topAnnoOut: Option[String] = None,
topDotfOut: Option[String] = None,
harnessTop: Option[String] = None,
harnessFir: Option[String] = None,
harnessOutput: Option[String] = None,
synTop: Option[String] = None,
topFir: Option[String] = None,
topAnnoOut: Option[String] = None,
topDotfOut: Option[String] = None,
harnessTop: Option[String] = None,
harnessFir: Option[String] = None,
harnessAnnoOut: Option[String] = None,
harnessDotfOut: Option[String] = None,
harnessConf: Option[String] = None
) extends LazyLogging
harnessConf: Option[String] = None)
extends LazyLogging
// Requires two phases, one to collect modules below synTop in the hierarchy
// and a second to remove those modules to generate the test harness
@@ -190,9 +210,9 @@ sealed trait GenerateTopAndHarnessApp extends LazyLogging { this: App =>
annoFile.foreach { annoPath =>
val outputFile = new java.io.PrintWriter(annoPath)
outputFile.write(JsonProtocol.serialize(res.circuitState.annotations.filter(_ match {
case da: DeletedAnnotation => false
case ec: EmittedComponent => false
case ea: EmittedAnnotation[_] => false
case da: DeletedAnnotation => false
case ec: EmittedComponent => false
case ea: EmittedAnnotation[_] => false
case fca: FirrtlCircuitAnnotation => false
case _ => true
})))
@@ -207,7 +227,7 @@ sealed trait GenerateTopAndHarnessApp extends LazyLogging { this: App =>
result match {
case x: FirrtlExecutionSuccess =>
dump(x, tapeoutOptions.topFir, tapeoutOptions.topAnnoOut)
x.circuitState.circuit.modules.collect{ case e: ExtModule => e }
x.circuitState.circuit.modules.collect { case e: ExtModule => e }
case x =>
throw new Exception(s"executeTop failed while executing FIRRTL!\n${x}")
}
@@ -220,9 +240,9 @@ sealed trait GenerateTopAndHarnessApp extends LazyLogging { this: App =>
val harnessAnnos =
tapeoutOptions.harnessDotfOut.map(BlackBoxResourceFileNameAnno(_)).toSeq ++
harnessTop.map(ht => ModuleNameSuffixAnnotation(rootCircuitTarget, s"_in${ht}")) ++
synTop.map(st => ConvertToExtModAnnotation(rootCircuitTarget.module(st))) :+
LinkExtModulesAnnotation(topExtModules)
harnessTop.map(ht => ModuleNameSuffixAnnotation(rootCircuitTarget, s"_in${ht}")) ++
synTop.map(st => ConvertToExtModAnnotation(rootCircuitTarget.module(st))) :+
LinkExtModulesAnnotation(topExtModules)
// For harness run, change some firrtlOptions (below) for harness phase
// customTransforms: setup harness transforms, add AvoidExtModuleCollisions
@@ -233,7 +253,7 @@ sealed trait GenerateTopAndHarnessApp extends LazyLogging { this: App =>
outputFileNameOverride = tapeoutOptions.harnessOutput.get,
annotations = firrtlOptions.annotations.map({
case ReplSeqMemAnnotation(i, o) => ReplSeqMemAnnotation(i, tapeoutOptions.harnessConf.get)
case a => a
case a => a
}) ++ harnessAnnos
)
val harnessResult = firrtl.Driver.execute(optionsManager)

9
tapeout/src/main/scala/barstools/tapeout/transforms/ReParentCircuit.scala
View File

@@ -8,14 +8,13 @@ import firrtl.options.Dependency
import firrtl.stage.Forms
import firrtl.stage.TransformManager.TransformDependency
case class ReParentCircuitAnnotation(target: ModuleTarget)
extends SingleTargetAnnotation[ModuleTarget] {
case class ReParentCircuitAnnotation(target: ModuleTarget) extends SingleTargetAnnotation[ModuleTarget] {
def duplicate(n: ModuleTarget) = this.copy(n)
}
class ReParentCircuit extends Transform with DependencyAPIMigration {
override def prerequisites: Seq[TransformDependency] = Forms.HighForm
override def prerequisites: Seq[TransformDependency] = Forms.HighForm
override def optionalPrerequisites: Seq[TransformDependency] = Seq.empty
override def optionalPrerequisiteOf: Seq[TransformDependency] = {
Forms.HighEmitters :+ Dependency[RemoveUnusedModules]
@@ -24,8 +23,8 @@ class ReParentCircuit extends Transform with DependencyAPIMigration {
def execute(state: CircuitState): CircuitState = {
val c = state.circuit
val newTopName = state.annotations.collectFirst {
case ReParentCircuitAnnotation(tgt) => tgt.module
val newTopName = state.annotations.collectFirst { case ReParentCircuitAnnotation(tgt) =>
tgt.module
}
val newCircuit = c.copy(main = newTopName.getOrElse(c.main))
val mainRename = newTopName.map { s =>

20
tapeout/src/main/scala/barstools/tapeout/transforms/RemoveUnusedModules.scala
View File

@@ -14,7 +14,7 @@ import firrtl.stage.TransformManager.TransformDependency
// instance (starting at the main module)
class RemoveUnusedModules extends Transform with DependencyAPIMigration {
override def prerequisites: Seq[TransformDependency] = Forms.HighForm
override def prerequisites: Seq[TransformDependency] = Forms.HighForm
override def optionalPrerequisites: Seq[TransformDependency] = Seq.empty
override def optionalPrerequisiteOf: Seq[TransformDependency] = {
Forms.HighEmitters :+ Dependency[ReplSeqMem]
@@ -22,8 +22,8 @@ class RemoveUnusedModules extends Transform with DependencyAPIMigration {
override def invalidates(a: Transform): Boolean = false
def execute(state: CircuitState): CircuitState = {
val modulesByName = state.circuit.modules.map{
case m: Module => (m.name, Some(m))
val modulesByName = state.circuit.modules.map {
case m: Module => (m.name, Some(m))
case m: ExtModule => (m.name, None)
}.toMap
@@ -33,7 +33,7 @@ class RemoveUnusedModules extends Transform with DependencyAPIMigration {
def someStatements(statement: Statement): Seq[Statement] =
statement match {
case b: Block =>
b.stmts.map{ someStatements(_) }
b.stmts.map { someStatements(_) }
.foldLeft(Seq[Statement]())(_ ++ _)
case when: Conditionally =>
someStatements(when.conseq) ++ someStatements(when.alt)
@@ -41,11 +41,11 @@ class RemoveUnusedModules extends Transform with DependencyAPIMigration {
case _ => Seq()
}
someStatements(m.body).map{
case s: DefInstance => Set(s.module) | getUsedModules(modulesByName(s.module))
case _ => Set[String]()
}.foldLeft(Set(m.name))(_ | _)
}
someStatements(m.body).map {
case s: DefInstance => Set(s.module) | getUsedModules(modulesByName(s.module))
case _ => Set[String]()
}.foldLeft(Set(m.name))(_ | _)
}
case None => Set.empty[String]
}
@@ -57,7 +57,7 @@ class RemoveUnusedModules extends Transform with DependencyAPIMigration {
val renames = state.renames.getOrElse(RenameMap())
state.circuit.modules.filterNot { usedModuleSet contains _.name } foreach { x =>
state.circuit.modules.filterNot { usedModuleSet contains _.name }.foreach { x =>
renames.record(ModuleTarget(state.circuit.main, x.name), Nil)
}

13
tapeout/src/main/scala/barstools/tapeout/transforms/ResetInverter.scala
View File

@@ -20,10 +20,9 @@ object ResetN extends Pass {
// Only works on Modules with a Bool port named reset
def invertReset(mod: Module): Module = {
// Check that it actually has reset
require(mod.ports.exists(p => p.name == "reset" && p.tpe == Bool),
"Can only invert reset on a module with reset!")
require(mod.ports.exists(p => p.name == "reset" && p.tpe == Bool), "Can only invert reset on a module with reset!")
// Rename "reset" to "reset_n"
val portsx = mod.ports map {
val portsx = mod.ports.map {
case Port(info, "reset", Input, Bool) =>
Port(info, "reset_n", Input, Bool)
case other => other
@@ -34,7 +33,7 @@ object ResetN extends Pass {
}
def run(c: Circuit): Circuit = {
c.copy(modules = c.modules map {
c.copy(modules = c.modules.map {
case mod: Module if mod.name == c.main => invertReset(mod)
case other => other
})
@@ -43,8 +42,8 @@ object ResetN extends Pass {
class ResetInverterTransform extends Transform with DependencyAPIMigration {
override def prerequisites: Seq[TransformDependency] = Forms.LowForm
override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
override def prerequisites: Seq[TransformDependency] = Forms.LowForm
override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
override def optionalPrerequisiteOf: Seq[TransformDependency] = Forms.LowEmitters
override def invalidates(a: Transform): Boolean = false
@@ -64,7 +63,7 @@ trait ResetInverter {
def invert[T <: chisel3.internal.LegacyModule](module: T): Unit = {
chisel3.experimental.annotate(new chisel3.experimental.ChiselAnnotation with RunFirrtlTransform {
def transformClass: Class[_ <: Transform] = classOf[ResetInverterTransform]
def toFirrtl: Annotation = ResetInverterAnnotation(module.toNamed)
def toFirrtl: Annotation = ResetInverterAnnotation(module.toNamed)
})
}
}

25
tapeout/src/main/scala/barstools/tapeout/transforms/retime/Retime.scala
View File

@@ -14,23 +14,24 @@ case class RetimeAnnotation(target: Named) extends SingleTargetAnnotation[Named]
class RetimeTransform extends Transform with DependencyAPIMigration {
override def prerequisites: Seq[TransformDependency] = Forms.LowForm
override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
override def prerequisites: Seq[TransformDependency] = Forms.LowForm
override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
override def optionalPrerequisiteOf: Seq[TransformDependency] = Forms.LowEmitters
override def invalidates(a: Transform): Boolean = false
override def execute(state: CircuitState): CircuitState = {
state.annotations.filter(_.isInstanceOf[RetimeAnnotation]) match {
case Nil => state
case seq => seq.foreach {
case RetimeAnnotation(ModuleName(module, CircuitName(_))) =>
logger.info(s"Retiming module $module")
case RetimeAnnotation(ComponentName(name, ModuleName(module, CircuitName(_)))) =>
logger.info(s"Retiming instance $module.$name")
case _ =>
throw new Exception(s"There should be RetimeAnnotations, got ${seq.mkString(" -- ")}")
}
state
case seq =>
seq.foreach {
case RetimeAnnotation(ModuleName(module, CircuitName(_))) =>
logger.info(s"Retiming module $module")
case RetimeAnnotation(ComponentName(name, ModuleName(module, CircuitName(_)))) =>
logger.info(s"Retiming instance $module.$name")
case _ =>
throw new Exception(s"There should be RetimeAnnotations, got ${seq.mkString(" -- ")}")
}
state
}
}
}
@@ -41,7 +42,7 @@ trait RetimeLib {
def retime[T <: chisel3.internal.LegacyModule](module: T): Unit = {
chisel3.experimental.annotate(new chisel3.experimental.ChiselAnnotation with RunFirrtlTransform {
def transformClass: Class[_ <: Transform] = classOf[RetimeTransform]
def toFirrtl: Annotation = RetimeAnnotation(module.toNamed)
def toFirrtl: Annotation = RetimeAnnotation(module.toNamed)
})
}
}

19
tapeout/src/main/scala/barstools/tapeout/transforms/utils/FileUtils.scala
View File

@@ -2,7 +2,7 @@
package barstools.tapeout.transforms
import chisel3.experimental.{ChiselAnnotation, annotate}
import chisel3.experimental.{annotate, ChiselAnnotation}
import firrtl._
import firrtl.annotations._
import firrtl.stage.Forms
@@ -12,7 +12,7 @@ import firrtl.transforms.BlackBoxTargetDirAnno
object WriteConfig {
def apply(dir: String, file: String, contents: String): Unit = {
val writer = new java.io.PrintWriter(new java.io.File(s"$dir/$file"))
writer write contents
writer.write(contents)
writer.close()
}
}
@@ -22,14 +22,14 @@ object GetTargetDir {
val annos = state.annotations
val destDir = annos.map {
case BlackBoxTargetDirAnno(s) => Some(s)
case _ => None
case _ => None
}.flatten
val loc = {
if (destDir.isEmpty) "."
else destDir.head
}
val targetDir = new java.io.File(loc)
if(!targetDir.exists()) FileUtils.makeDirectory(targetDir.getAbsolutePath)
if (!targetDir.exists()) FileUtils.makeDirectory(targetDir.getAbsolutePath)
loc
}
}
@@ -53,8 +53,8 @@ case class TechnologyLocationAnnotation(dir: String) extends SingleTargetAnnotat
class TechnologyLocation extends Transform with DependencyAPIMigration {
override def prerequisites: Seq[TransformDependency] = Forms.LowForm
override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
override def prerequisites: Seq[TransformDependency] = Forms.LowForm
override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
override def optionalPrerequisiteOf: Seq[TransformDependency] = Forms.LowEmitters
def execute(state: CircuitState): CircuitState = {
@@ -65,18 +65,15 @@ class TechnologyLocation extends Transform with DependencyAPIMigration {
val annos = state.annotations
val dir = annos.flatMap {
case TechnologyLocationAnnotation(dir) => Some(dir)
case _ => None
case _ => None
}
dir.length match {
case 0 => ""
case 1 =>
val targetDir = new java.io.File(dir.head)
if(!targetDir.exists()) throw new Exception(s"Technology yaml directory $targetDir doesn't exist!")
if (!targetDir.exists()) throw new Exception(s"Technology yaml directory $targetDir doesn't exist!")
dir.head
case _ => throw new Exception("Only 1 tech directory annotation allowed!")
}
}
}

4
tapeout/src/main/scala/barstools/tapeout/transforms/utils/LowerAnnotations.scala
View File

@@ -1,5 +1,5 @@
package barstools.tapeout.transforms
object LowerName {
def apply(s: String): String = s.replace(".", "_").replace("[", "_")replace("]", "")
}
def apply(s: String): String = s.replace(".", "_").replace("[", "_").replace("]", "")
}

12
tapeout/src/main/scala/barstools/tapeout/transforms/utils/ProgrammaticBundle.scala
View File

@@ -4,17 +4,17 @@ import chisel3._
import scala.collection.immutable.ListMap
class CustomBundle[T <: Data](elts: (String, T)*) extends Record {
val elements = ListMap(elts map { case (field, elt) => field -> chiselTypeOf(elt) }: _*)
val elements = ListMap(elts.map { case (field, elt) => field -> chiselTypeOf(elt) }: _*)
def apply(elt: String): T = elements(elt)
def apply(elt: Int): T = elements(elt.toString)
def apply(elt: Int): T = elements(elt.toString)
override def cloneType = (new CustomBundle(elements.toList: _*)).asInstanceOf[this.type]
}
class CustomIndexedBundle[T <: Data](elts: (Int, T)*) extends Record {
// Must be String, Data
val elements = ListMap(elts map { case (field, elt) => field.toString -> chiselTypeOf(elt) }: _*)
val elements = ListMap(elts.map { case (field, elt) => field.toString -> chiselTypeOf(elt) }: _*)
// TODO: Make an equivalent to the below work publicly (or only on subclasses?)
def indexedElements = ListMap(elts map { case (field, elt) => field -> chiselTypeOf(elt) }: _*)
def indexedElements = ListMap(elts.map { case (field, elt) => field -> chiselTypeOf(elt) }: _*)
def apply(elt: Int): T = elements(elt.toString)
override def cloneType = (new CustomIndexedBundle(indexedElements.toList: _*)).asInstanceOf[this.type]
}
@@ -22,5 +22,7 @@ class CustomIndexedBundle[T <: Data](elts: (Int, T)*) extends Record {
object CustomIndexedBundle {
def apply[T <: Data](gen: T, idxs: Seq[Int]) = new CustomIndexedBundle(idxs.map(_ -> gen): _*)
// Allows Vecs of elements of different types/widths
def apply[T <: Data](gen: Seq[T]) = new CustomIndexedBundle(gen.zipWithIndex.map{ case (elt, field) => field -> elt }: _*)
def apply[T <: Data](gen: Seq[T]) = new CustomIndexedBundle(gen.zipWithIndex.map { case (elt, field) =>
field -> elt
}: _*)
}

10
tapeout/src/main/scala/barstools/tapeout/transforms/utils/YamlHelpers.scala
View File

@@ -4,18 +4,18 @@ import net.jcazevedo.moultingyaml._
import java.io.File
class YamlFileReader(resource: String) {
def parse[A](file: String = "")(implicit reader: YamlReader[A]) : Seq[A] = {
def parse[A](file: String = "")(implicit reader: YamlReader[A]): Seq[A] = {
// If the user doesn't provide a Yaml file name, use defaults
val yamlString = file match {
case f if f.isEmpty =>
case f if f.isEmpty =>
// Use example config if no file is provided
val stream = getClass.getResourceAsStream(resource)
io.Source.fromInputStream(stream).mkString
case f if new File(f).exists =>
case f if new File(f).exists =>
scala.io.Source.fromFile(f).getLines.mkString("\n")
case _ =>
case _ =>
throw new Exception("No valid Yaml file found!")
}
yamlString.parseYamls.map(x => reader.read(x))
}
}
}

19
tapeout/src/test/scala/barstools/tapeout/transforms/ResetInverterSpec.scala
View File

@@ -29,14 +29,17 @@ class ResetNSpec extends FreeSpec with Matchers {
"Inverting reset needs to be done throughout module when generating firrtl" in {
// generate low-firrtl
val firrtl = (new ChiselStage).execute(
Array("-X", "low"),
Seq(ChiselGeneratorAnnotation(() => new ExampleModuleNeedsResetInverted))
).collect {
case EmittedFirrtlCircuitAnnotation(a) => a
case EmittedFirrtlModuleAnnotation(a) => a
}.map(_.value)
.mkString("")
val firrtl = (new ChiselStage)
.execute(
Array("-X", "low"),
Seq(ChiselGeneratorAnnotation(() => new ExampleModuleNeedsResetInverted))
)
.collect {
case EmittedFirrtlCircuitAnnotation(a) => a
case EmittedFirrtlModuleAnnotation(a) => a
}
.map(_.value)
.mkString("")
firrtl should include("input reset_n :")
firrtl should include("node reset = not(reset_n)")

44
tapeout/src/test/scala/barstools/tapeout/transforms/retime/RetimeSpec.scala
View File

@@ -19,18 +19,20 @@ class RetimeSpec extends FlatSpec with Matchers {
}
def getLowFirrtl[T <: RawModule](gen: () => T, extraArgs: Array[String] = Array.empty): String = {
// generate low firrtl
(new ChiselStage).execute(
Array("-X", "low") ++ extraArgs,
Seq(ChiselGeneratorAnnotation(gen))
).collect {
case EmittedFirrtlCircuitAnnotation(a) => a
case EmittedFirrtlModuleAnnotation(a) => a
}.map(_.value)
.mkString("")
(new ChiselStage)
.execute(
Array("-X", "low") ++ extraArgs,
Seq(ChiselGeneratorAnnotation(gen))
)
.collect {
case EmittedFirrtlCircuitAnnotation(a) => a
case EmittedFirrtlModuleAnnotation(a) => a
}
.map(_.value)
.mkString("")
}
behavior of "retime library"
behavior.of("retime library")
it should "pass simple retime module annotation" in {
val gen = () => new RetimeModule
@@ -41,15 +43,18 @@ class RetimeSpec extends FlatSpec with Matchers {
Logger.setOutput(captor.printStream)
// generate low firrtl
val firrtl = getLowFirrtl(gen,
Array("-td", s"test_run_dir/$dir", "-foaf", s"test_run_dir/$dir/final", "--log-level", "info"))
val firrtl = getLowFirrtl(
gen,
Array("-td", s"test_run_dir/$dir", "-foaf", s"test_run_dir/$dir/final", "--log-level", "info")
)
firrtl.nonEmpty should be(true)
//Make sure we got the RetimeTransform scheduled
captor.getOutputAsString should include ("barstools.tapeout.transforms.retime.RetimeTransform")
captor.getOutputAsString should include("barstools.tapeout.transforms.retime.RetimeTransform")
}
val lines = FileUtils.getLines(s"test_run_dir/$dir/test_run_dir/$dir/final.anno.json")
val lines = FileUtils
.getLines(s"test_run_dir/$dir/test_run_dir/$dir/final.anno.json")
.map(normalized)
.mkString("\n")
lines should include("barstools.tapeout.transforms.retime.RetimeAnnotation")
@@ -65,15 +70,18 @@ class RetimeSpec extends FlatSpec with Matchers {
Logger.setOutput(captor.printStream)
// generate low firrtl
val firrtl = getLowFirrtl(gen,
Array("-td", s"test_run_dir/$dir", "-foaf", s"test_run_dir/$dir/final", "--log-level", "info"))
val firrtl = getLowFirrtl(
gen,
Array("-td", s"test_run_dir/$dir", "-foaf", s"test_run_dir/$dir/final", "--log-level", "info")
)
firrtl.nonEmpty should be(true)
//Make sure we got the RetimeTransform scheduled
captor.getOutputAsString should include ("barstools.tapeout.transforms.retime.RetimeTransform")
captor.getOutputAsString should include("barstools.tapeout.transforms.retime.RetimeTransform")
}
val lines = FileUtils.getLines(s"test_run_dir/$dir/test_run_dir/$dir/final.anno.json")
val lines = FileUtils
.getLines(s"test_run_dir/$dir/test_run_dir/$dir/final.anno.json")
.map(normalized)
.mkString("\n")
lines should include("barstools.tapeout.transforms.retime.RetimeAnnotation")