Jerry Zhao
|
333df95a42
|
Set default config back to 1-channel
|
2023-05-23 12:07:28 -07:00 |
|
Vamber Yang
|
9efd72ee2b
|
Add more configs for coalescer perf testing
Add run-coalperfs.sh in sims/vcs for ease of testing (please delete this file in the future)
|
2023-05-20 08:52:15 -07:00 |
|
Jerry Zhao
|
b69bcffc91
|
Merge remote-tracking branch 'origin/main' into unify
|
2023-05-19 11:28:52 -07:00 |
|
Jerry Zhao
|
7184848bf6
|
Merge pull request #1476 from ucb-bar/serial-bump
Support uni-directional TLSerdesser
|
2023-05-19 11:21:35 -07:00 |
|
abejgonzalez
|
6b3c8f9bf4
|
Bump CVA6
|
2023-05-18 00:14:49 -07:00 |
|
abejgonzalez
|
dbe352e9dc
|
Merge remote-tracking branch 'origin/main' into use-fat-jar
|
2023-05-17 18:12:21 -07:00 |
|
Jerry Zhao
|
76cf492bdf
|
Merge pull request #1467 from ucb-bar/jerryz123-patch-2
Generate objdump | check BINARY | cospike fixes
|
2023-05-17 16:07:11 -07:00 |
|
Jerry Zhao
|
abf2af16b4
|
Cospike should always include zicntr
|
2023-05-17 16:06:24 -07:00 |
|
Jerry Zhao
|
c2ca66ac4d
|
Support ssip interrupts in spike-cosim
|
2023-05-17 15:21:11 -07:00 |
|
Vamber Yang
|
439a72f21b
|
Add new config for using PriorityXBar for coalescer
|
2023-05-16 20:27:52 -07:00 |
|
Vamber Yang
|
e7980b7b75
|
adding more Memtrace configs of different Sbus width
|
2023-05-16 05:54:16 -07:00 |
|
Jerry Zhao
|
f4739be632
|
Update multi-chip API for harnesses
|
2023-05-15 00:03:22 -07:00 |
|
Jerry Zhao
|
fa91426cf5
|
Update comment for AbsoluteFreqHarnessClockInstantiator
|
2023-05-14 21:48:38 -07:00 |
|
Jerry Zhao
|
a207e37725
|
Update MultiClockRocket frequencies
|
2023-05-14 21:48:18 -07:00 |
|
Jerry Zhao
|
0223a75f01
|
Size down number of concurrent requests allowed on SerialTL
|
2023-05-14 18:52:37 -07:00 |
|
Jerry Zhao
|
d4d81f7d22
|
Rename serialManagerParams -> serialTLManagerParams
|
2023-05-13 19:25:14 -07:00 |
|
Jerry Zhao
|
3330c23193
|
Support uni-directional TLSerdesser
|
2023-05-13 14:14:38 -07:00 |
|
Jerry Zhao
|
2077e4304d
|
Explicitly provide refClockFreqMHz to harnessClockInstantiator
|
2023-05-13 11:18:03 -07:00 |
|
Jerry Zhao
|
b8e95e0305
|
Rename implicit clock/reset to referenceclock/reset
|
2023-05-12 15:11:44 -07:00 |
|
Jerry Zhao
|
94d471bd9a
|
Set firesim harnessbinder freq to 1000 MHz by default
|
2023-05-12 14:44:07 -07:00 |
|
Jerry Zhao
|
85bb945555
|
Fix bug in cospike
|
2023-05-12 11:34:31 -07:00 |
|
Jerry Zhao
|
7ae43a1829
|
Fix tracegenconfig
|
2023-05-12 10:51:34 -07:00 |
|
Jerry Zhao
|
b42a3d4896
|
Make Passthrough clock assert more verbose
|
2023-05-12 10:51:27 -07:00 |
|
Jerry Zhao
|
607c2b5a73
|
Unify multi-node btw chipyard/firechip | unify harness clocking
|
2023-05-12 08:41:34 -07:00 |
|
Hansung Kim
|
7ed3d294c8
|
Add WithCoalescer to SoC config
|
2023-05-12 01:20:23 -07:00 |
|
Jerry Zhao
|
0cbca54e19
|
Remove TestChipBusFreqs (this is ChipLikeRocketConfig)
|
2023-05-12 00:03:36 -07:00 |
|
Hansung Kim
|
dc4b8bd615
|
Bump rocket-chip
|
2023-05-11 18:53:54 -07:00 |
|
Jerry Zhao
|
64ad77bbcf
|
Make FPGA flows use the harnessClockInstantiator
|
2023-05-11 15:04:04 -07:00 |
|
Jerry Zhao
|
a9bc11accb
|
Update comments on harnessbinders in AbstractConfig
|
2023-05-11 15:04:04 -07:00 |
|
Jerry Zhao
|
1a6b34696e
|
Set a more realistic 500 MHz uncore clock:
|
2023-05-11 15:04:04 -07:00 |
|
Jerry Zhao
|
4dd017d181
|
Fix WithClockAndResetFromHarness to actually request harness clocks
|
2023-05-11 15:04:04 -07:00 |
|
Jerry Zhao
|
f4bf1b0a28
|
Fix multiclockrocketconfig
|
2023-05-11 15:04:04 -07:00 |
|
Jerry Zhao
|
624785376a
|
Fix PassThroughClockGenerator to handle multiclock properly
|
2023-05-11 15:04:04 -07:00 |
|
Jerry Zhao
|
ffc4d1f662
|
Use getClass.getSimpleName for ClockSourceAtFreqMHz blackbox inline
|
2023-05-11 15:04:04 -07:00 |
|
Jerry Zhao
|
1916d3e4fc
|
Add timeunit to ClockSourceAtFreqMHz
|
2023-05-11 15:04:04 -07:00 |
|
Jerry Zhao
|
bcd273986f
|
Fix ClockSourceAtFreqMHz period calc
|
2023-05-11 15:04:03 -07:00 |
|
Jerry Zhao
|
5c8ea080ee
|
Switch to our own ClockSourceAtFreq that is verilator-compatible
|
2023-05-11 15:04:03 -07:00 |
|
Jerry Zhao
|
71fe1ad858
|
Switch RTL sims to absolute clock-generators
|
2023-05-11 15:04:03 -07:00 |
|
Jerry Zhao
|
c148f1daf1
|
Make BootAddrReg optional
|
2023-05-10 11:44:03 -07:00 |
|
Jerry Zhao
|
fbfb518b72
|
Merge remote-tracking branch 'origin/main' into renameserial
|
2023-05-10 11:39:11 -07:00 |
|
Sagar Karandikar
|
1c10f75622
|
Merge pull request #1471 from ucb-bar/lowmem-configs
Add 1GB / 4GB DRAM firechip configs for FireSim VCU118
|
2023-05-10 11:32:01 -07:00 |
|
Sagar Karandikar
|
abe8a7fb8b
|
remove extra newlines
|
2023-05-10 11:31:05 -07:00 |
|
Hansung Kim
|
afbb67f934
|
Bump rocket-chip
|
2023-05-10 01:24:28 -07:00 |
|
Hansung Kim
|
013782a5db
|
Update path to WithMemtraceCore
|
2023-05-09 22:23:36 -07:00 |
|
Jerry Zhao
|
94f83e319a
|
Fix bugs in spike-cosim
|
2023-05-09 17:39:48 -07:00 |
|
abejgonzalez
|
2997cddc0e
|
Merge remote-tracking branch 'origin/main' into bump-verilator
|
2023-05-09 13:27:13 -07:00 |
|
Hansung Kim
|
58f3fc221c
|
Bump rocket-chip to reflect memtrace config update
|
2023-05-09 13:10:14 -07:00 |
|
Hansung Kim
|
87b64575f8
|
Refactor memtrace SoC configuration
|
2023-05-09 13:08:49 -07:00 |
|
Jerry Zhao
|
eced8e63d9
|
Rename SerialAdapter+SimSerial to TSIToTileLink/SimTSI/TSIHarness
|
2023-05-08 18:19:18 -07:00 |
|
Sagar Karandikar
|
95da9cefb5
|
4GB DRAM configs
|
2023-05-08 13:41:51 -07:00 |
|