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Fix bugs in spike-cosim

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This commit is contained in:
Jerry Zhao
2023-05-09 17:39:48 -07:00
parent ff3b66e2f2
commit 94f83e319a
1 changed files with 11 additions and 10 deletions
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21
generators/chipyard/src/main/resources/csrc/cospike.cc
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@@ -284,9 +284,9 @@ extern "C" void cospike_cosim(long long int cycle,
printf("%d exception %lx\n", cycle, cause);
if (valid) {
printf("%d Cosim: %lx", cycle, iaddr);
if (has_wdata) {
printf(" s: %lx", wdata);
}
// if (has_wdata) {
// printf(" s: %lx", wdata);
// }
printf("\n");
}
if (valid || raise_interrupt || raise_exception) {
@@ -299,7 +299,7 @@ extern "C" void cospike_cosim(long long int cycle,
}
}
if (valid) {
if (valid && !raise_exception) {
if (s_pc != iaddr) {
printf("%d PC mismatch spike %llx != DUT %llx\n", cycle, s_pc, iaddr);
if (unlikely(cospike_debug)) {
@@ -373,12 +373,13 @@ extern "C" void cospike_cosim(long long int cycle,
bool csr_read = (insn & 0x7f) == 0x73;
if (csr_read)
printf("CSR read %lx\n", csr_addr);
if (csr_read && ((csr_addr == 0xf13) || // mimpid
(csr_addr == 0xf12) || // marchid
(csr_addr == 0xf11) || // mvendorid
(csr_addr == 0xb00) || // mcycle
(csr_addr == 0xb02) || // minstret
(csr_addr >= 0x3b0 && csr_addr <= 0x3ef) // pmpaddr
if (csr_read && ((csr_addr == 0xf13) || // mimpid
(csr_addr == 0xf12) || // marchid
(csr_addr == 0xf11) || // mvendorid
(csr_addr == 0xb00) || // mcycle
(csr_addr == 0xb02) || // minstret
(csr_addr >= 0x7a0 && csr_addr <= 0x7aa) || // debug trigger registers
(csr_addr >= 0x3b0 && csr_addr <= 0x3ef) // pmpaddr
)) {
printf("CSR override\n");
s->XPR.write(rd, wdata);