Add WithCoalescer to SoC config

This commit is contained in:
Hansung Kim
2023-05-12 01:19:19 -07:00
parent dc4b8bd615
commit 7ed3d294c8
2 changed files with 5 additions and 2 deletions

View File

@@ -6,7 +6,10 @@ import freechips.rocketchip.diplomacy.{AsynchronousCrossing}
class MemtraceCoreConfig extends Config(
// Memtrace
new freechips.rocketchip.subsystem.WithMemtraceCore("vecadd.core1.thread4.trace",
traceHasSource = true) ++
traceHasSource = false) ++
// new freechips.rocketchip.subsystem.WithMemtraceCore("nvbit.vecadd.n100000.filter_sm0.trace",
// traceHasSource = false) ++
new freechips.rocketchip.subsystem.WithCoalescer ++
new freechips.rocketchip.subsystem.WithNLanes(4) ++
// L2
new freechips.rocketchip.subsystem.WithInclusiveCache(nWays=8, capacityKB=512) ++