Edward Wang
870e3c1af1
All depth tests now fully automatic
2017-10-03 11:56:30 -07:00
Edward Wang
ae139ede44
Fix another name collision
2017-10-03 11:56:30 -07:00
Edward Wang
79f73311d8
Uniquify names
2017-10-03 11:56:30 -07:00
Edward Wang
9670d76a3d
Moar SRAM generators, yum yum
2017-10-03 11:56:30 -07:00
Donggyu Kim
c4502fca6d
map macros to sequential memeory
2017-10-03 11:56:30 -07:00
Donggyu Kim
7cb5604dfa
add optimizations
2017-10-03 11:56:30 -07:00
Donggyu Kim
9de1f5f2c0
restructure macros for better submoduling
2017-10-03 11:56:30 -07:00
Edward Wang
607e810b1d
Autogenerate almost all the depth tests
2017-10-03 11:56:30 -07:00
Edward Wang
8beb8b3f6f
Don't unbox BigInt to Double
2017-10-03 11:56:30 -07:00
Edward Wang
bb2783994a
Only use powers of two masks, for now
2017-10-03 11:56:30 -07:00
Edward Wang
cf0d40f658
Fix typos
2017-10-03 11:56:30 -07:00
Edward Wang
80ca2e538f
Use require statement
2017-10-03 11:56:30 -07:00
Edward Wang
3cb424cf80
Add non power of two tests
2017-10-03 11:56:30 -07:00
Edward Wang
42febeb32a
Rename files
2017-10-03 11:56:30 -07:00
Edward Wang
c79ea47909
Port to MDF library and start re-developing tests
2017-10-03 11:56:30 -07:00
Donggyu Kim
57b0fec78e
anonymize technology
2017-10-03 11:56:30 -07:00
Donggyu Kim
aeb303a61b
Colin's fixes
2017-10-03 11:56:30 -07:00
Donggyu Kim
2fd928fbe0
fix cost
2017-10-03 11:56:30 -07:00
Donggyu Kim
02fef8e2c3
graceful handling of empty files
2017-10-03 11:56:30 -07:00
Donggyu Kim
9e7c8dce3e
add SynFlops
2017-10-03 11:56:30 -07:00
Donggyu Kim
4f5a9ae02e
connect extra ports
2017-10-03 11:56:30 -07:00
Donggyu Kim
98155dd831
tests for macro compiler
2017-10-03 11:56:30 -07:00
Donggyu Kim
f3d39ad08f
initial port attempt for macro compiler
2017-10-03 11:56:30 -07:00
Colin Schmidt
44899f1b01
Merge pull request #19 from cpehle/patch-1
...
Point to correct path of riscv-tools directory
2017-09-26 15:33:41 -04:00
cpehle
2e544f03e0
Point to correct path of riscv-tools directory
2017-09-26 19:52:39 +02:00
Howard Mao
93d6c52024
make sure mstatus bits are set properly before entering second boot stage
2017-09-14 23:41:32 -07:00
Howard Mao
4dd2d5f881
have core 0 interrupt other cores
2017-09-12 20:33:36 -07:00
Howard Mao
2a4e994b09
bump rocket-chip and testchipip
2017-09-11 16:52:23 +00:00
Howard Mao
92087ef388
get rid of NIC tests
2017-09-08 10:35:49 -07:00
Adam Izraelevitz
c5d01ba19c
Added retime annotation
2017-09-06 14:44:09 -07:00
Adam Izraelevitz
96939c9ab6
Moved clkgen -> .clkgen and pads -> .pads
...
They no longer compile with the latest Chisel/FIRRTL, and
may not be supported. However, future work will need them, so
this keeps the files around but are ignored by sbt.
2017-09-06 14:44:09 -07:00
Howard Mao
506afbb363
bump rocket-chip for flattened coreplex/system
2017-08-31 14:35:13 -07:00
Howard Mao
cb79078641
get rid of tlserdes project
2017-08-31 14:34:35 -07:00
Howard Mao
91df4098f3
remove SimpleNIC
2017-08-31 11:06:41 -07:00
Howard Mao
171abb54e7
fix README
2017-08-22 16:09:31 +00:00
Howard Mao
758e09037a
use stored MAC address in pingd
2017-07-21 21:50:28 +00:00
Howard Mao
f28f2379a4
SerialInterfaceWidth is not actually configurable
2017-07-21 06:12:25 +00:00
Howard Mao
ada96f3724
update verilator so that plusarg_reader works
2017-07-20 20:19:02 +00:00
Howard Mao
fae57b6daa
make sure verilator builds correctly
2017-07-20 19:44:23 +00:00
Howard Mao
6175249845
add project using a SERDES memory
2017-07-18 20:25:32 -07:00
Howard Mao
752a28893d
test multi-channel memory
2017-07-18 20:25:32 -07:00
Colin Schmidt
8e910df8ba
Merge pull request #12 from ucb-bar/fix-firrtl-error
...
Build firrtl first so we dont get that weird error
2017-07-17 12:34:47 -07:00
Colin Schmidt
098b031dc6
remove old readme about publish local
2017-07-13 17:07:28 -07:00
Colin Schmidt
24cb846812
Build firrtl first so we dont get that weird error
2017-07-13 16:58:52 -07:00
Howard Mao
984827db2e
update rocketchip
2017-07-12 10:44:27 -07:00
Jack Koenig
e2002cb62a
Add syntax highlighting to README.md
2017-07-07 17:26:17 -07:00
Howard Mao
67e7652ae7
add section on network device to README
2017-07-08 00:21:27 +00:00
Howard Mao
6d77cd2ff7
bump testchipip
2017-07-07 18:39:56 +00:00
Howard Mao
abef4737fa
connect SimNetwork to actual network
2017-07-04 03:54:32 +00:00
Howard Mao
cb6290539c
add network simulation C++ code
2017-07-01 19:58:31 -07:00
