Commit Graph

  • 87a4bbc757 Integrate WU architecture in Radiance wu-architecture abnerhexu 2026-05-25 19:25:59 +08:00
  • 5112f3665a Add Blackwell tensor core implementation and tests abnerhexu 2026-05-06 14:51:11 +08:00
  • 136cf70a58 Add Blackwell tensor core baseline plumbing abnerhexu 2026-04-25 10:15:31 +08:00
  • 2bbee0542b update radiance main with ae changes main Richard Yan 2025-01-31 22:26:44 -08:00
  • ae552222d6 Merge branch 'asplos-ae' Richard Yan 2025-01-31 19:17:14 -08:00
  • 4a0b1c05cd add defines for flash config Richard Yan 2025-01-30 23:58:50 -08:00
  • 34c33278d2 Merge branch 'asplos-ae' of https://github.com/ucb-bar/radiance into asplos-ae Richard Yan 2025-01-30 22:34:43 -08:00
  • 68e4ebb471 remove tensor dpu sv Richard Yan 2025-01-30 22:34:38 -08:00
  • dd6c53bd85 Deinit cyclotron submodules Hansung Kim 2025-01-30 21:35:39 -08:00
  • adcb033edf Merge branch 'asplos-ae' of https://github.com/ucb-bar/radiance into asplos-ae Richard Yan 2025-01-30 02:55:44 -08:00
  • f1c9488081 set NUM_CORES and EXT_T_HOPPER based on config name Richard Yan 2025-01-30 02:55:40 -08:00
  • a88da88a63 fix microcode of manual job invocation Richard Yan 2025-01-29 01:17:24 -08:00
  • 892485eac9 Exclude cyclotron from build Hansung Kim 2025-01-29 00:04:15 -08:00
  • 1cd1f6fdcd Bump vortex Hansung Kim 2025-01-28 22:37:46 -08:00
  • 1ed1f4ceb0 Merge remote-tracking branch 'origin/main' into asplos-ae Hansung Kim 2025-01-28 22:29:19 -08:00
  • 52eeed277b correct loop count to start after receiving command Richard Yan 2025-01-28 17:41:00 -08:00
  • d38f69fc5e Merge branch 'main' of https://github.com/ucb-bar/radiance Richard Yan 2025-01-28 17:34:01 -08:00
  • 9b2328c252 Update submodule URLs Hansung Kim 2025-01-28 14:28:38 -08:00
  • 18064f0c3c update final config and connect completion io Richard Yan 2025-01-28 14:24:20 -08:00
  • dd2721d262 Bump cyclotron Hansung Kim 2025-01-05 00:12:11 -08:00
  • 17001efbf3 Remove emulator_generate and merge into emulator_tick Hansung Kim 2025-01-05 00:04:28 -08:00
  • 049394518b Default to debug mode for cyclotron Hansung Kim 2025-01-04 23:03:49 -08:00
  • a4fa1522ab Add D data to DPI interface Hansung Kim 2025-01-04 23:03:25 -08:00
  • 3af0670527 Add cyclotron-main Hansung Kim 2024-12-05 11:51:49 +09:00
  • ba67263b40 Update paths Hansung Kim 2024-12-04 18:14:29 -08:00
  • 81595a9a9f Bump cyclotron Hansung Kim 2024-12-04 18:10:19 -08:00
  • e3080bf3ee Update DPI for tick/generate split Hansung Kim 2024-12-04 18:07:55 -08:00
  • 6de4e875d4 Bump radpie Hansung Kim 2024-11-26 15:26:39 -08:00
  • 7cc40eedde Add EmulatorTile Hansung Kim 2024-11-26 15:23:24 -08:00
  • bf0527e2ad radiance.mk: Re-enable radpie; sync csrc/ as well Hansung Kim 2024-11-26 14:56:09 -08:00
  • 33ff495feb Fix doc errors and warnings for memfuzzer Hansung Kim 2024-11-26 11:49:26 -08:00
  • 9d70370801 Fix deprecation warnings in FuzzerTile Hansung Kim 2024-11-25 22:33:29 -08:00
  • 3b71276c4a tensor: Do dot-product in fp16, only do accum in fp32 Hansung Kim 2024-11-13 16:01:11 -08:00
  • 8c473f52e3 no tc client if not decoupled Richard Yan 2024-11-11 18:16:26 -08:00
  • 6488cb5c78 support no gemminis, trim debug prints Richard Yan 2024-11-11 16:14:02 -08:00
  • 465322af38 Merge branch 'new-cisc' Hansung Kim 2024-11-09 22:36:27 -08:00
  • 8056fa4ada Bump vortex Hansung Kim 2024-11-09 22:35:40 -08:00
  • 31f0905567 Add new opcode for compute and spad mvout Hansung Kim 2024-11-09 22:35:14 -08:00
  • ca63c9fa74 Bump vortex Hansung Kim 2024-11-08 21:53:21 -08:00
  • c87858b6f4 new cisc operations Richard Yan 2024-11-08 20:49:49 -08:00
  • 0c6618c65d back to non-blocking read Richard Yan 2024-11-07 18:20:37 -08:00
  • d49abf97ff amend config based on gemmini update Richard Yan 2024-11-03 21:07:06 -08:00
  • 9a5af03672 blocking gemmini fence and bump vortex Richard Yan 2024-11-01 02:45:08 -07:00
  • 99da429cb1 tensor: Move C reg access to execute stage for higher util Hansung Kim 2024-10-29 17:51:32 -07:00
  • 37b8b6470b Bump vortex with race fix Hansung Kim 2024-10-29 14:50:26 -07:00
  • 216cfb0589 Bump vortex Hansung Kim 2024-10-28 23:39:58 -07:00
  • 752effdb21 tensor: Add FIFOFixer to smem tensor port Hansung Kim 2024-10-28 23:38:56 -07:00
  • daabeb03ab tensor: Fix wrong addressGen that used bits not bytes Hansung Kim 2024-10-28 22:27:13 -07:00
  • 1ae1965580 tensor: Add IO and latching for smem address Hansung Kim 2024-10-28 19:28:45 -07:00
  • c22fd20616 Bump vortex to 8cores Hansung Kim 2024-10-27 19:47:52 -07:00
  • 0e389dc362 Bump vortex Hansung Kim 2024-10-27 18:49:42 -07:00
  • 0ba61aabb6 tensor: Instantiate correct fake tcore module according to parameter Hansung Kim 2024-10-27 18:48:44 -07:00
  • 13b9577723 Instantiate fake tensor modules outside of diplomacy Hansung Kim 2024-10-25 23:01:05 -07:00
  • 543eb2feb4 tensor: Support FP16 in TensorCoreDecoupled Hansung Kim 2024-10-25 22:26:04 -07:00
  • eed821eda6 tensor: Add test for 8-dim fp16 DPU Hansung Kim 2024-10-25 21:57:28 -07:00
  • 46a57fdf9b tensor: Parameterize dimension in TensorDotProductUnit Hansung Kim 2024-10-25 21:44:36 -07:00
  • 51dfebb6a7 tensor: Support pipe = 1 in FillBuffer for higher throughput Hansung Kim 2024-10-25 20:20:53 -07:00
  • d46a343239 tensor: Fix metadata of C req; fix dequeue / req gen timing Hansung Kim 2024-10-25 19:05:47 -07:00
  • 1a1a4a088d tensor: Fix access state transition to consider C req Hansung Kim 2024-10-25 18:23:51 -07:00
  • 991025e896 tensor: Fix C reg being dropped by checking space in respQueueC Hansung Kim 2024-10-25 18:10:35 -07:00
  • 81efecb3c8 tensor: Fix timing of fullCTag Hansung Kim 2024-10-25 17:29:35 -07:00
  • 43e064fe82 tensor: Add access logic for C from regfile Hansung Kim 2024-10-25 15:22:52 -07:00
  • fc5b864b86 Bump vortex; addResource tensor regfile if Hansung Kim 2024-10-24 20:35:14 -07:00
  • 31fa440000 Bump vortex Hansung Kim 2024-10-24 15:25:12 -07:00
  • ccfb467587 Bump vortex Hansung Kim 2024-10-24 11:58:09 -07:00
  • 988f0e3174 smem: Disable sanity check on partialData Hansung Kim 2024-10-24 11:57:40 -07:00
  • f989bfccc2 Add tensorCoreDecoupled param to WithRadianceCores Hansung Kim 2024-10-23 20:39:47 -07:00
  • 68e715e284 fix unaligned port Richard Yan 2024-10-24 13:42:45 -07:00
  • 9b8d16d184 Merge branch 'main' of https://github.com/ucb-bar/radiance into main Richard Yan 2024-10-23 15:09:48 -07:00
  • 0a54018650 dual read port srams Richard Yan 2024-10-23 15:09:43 -07:00
  • 2a8c488d28 tensor: Reassert initiate.ready as soon as access ready Hansung Kim 2024-10-22 23:10:11 -07:00
  • 95ecc5180f tensor: Decouple warp in execute from access Hansung Kim 2024-10-22 22:44:33 -07:00
  • 072904a82b Bump vortex Hansung Kim 2024-10-22 22:06:24 -07:00
  • 0a682fb6ef tensor: dontTouch TensorDPU io Hansung Kim 2024-10-22 17:55:14 -07:00
  • 85eb5e334f Bump vortex Hansung Kim 2024-10-22 17:47:54 -07:00
  • b566748bcb tensor: Address gen for block-wise contiguous layout Hansung Kim 2024-10-22 17:09:21 -07:00
  • 54ce0f7c34 tensor: Increase numSourceId to 16 to match RadianceTile Hansung Kim 2024-10-22 17:08:38 -07:00
  • 8818fc9203 tensor: Fix tagWidth for tensor mem io Hansung Kim 2024-10-22 16:26:08 -07:00
  • c613341a77 Disable addPath for old verilog; Deassert valid for tensor core Hansung Kim 2024-10-22 15:02:55 -07:00
  • 83c1e9a0be Merge branch 'tensor-decoupled' Hansung Kim 2024-10-22 14:35:04 -07:00
  • e705e8557f Fake tensor core at RadianceTile for Verilog unique-ification Hansung Kim 2024-10-22 14:32:53 -07:00
  • d705843c9c Merge commit 'origin/main~1' Hansung Kim 2024-10-21 22:41:03 -07:00
  • 0fe2b3b07e Bump vortex Hansung Kim 2024-10-21 22:39:28 -07:00
  • 408888ae8f tensor: addPath()s for hopper generated chisel Hansung Kim 2024-10-21 22:38:29 -07:00
  • a98cb32343 tensor: Inject stalls to A ram for fuzzing Hansung Kim 2024-10-21 21:56:36 -07:00
  • 8307d8d154 emergency push Richard Yan 2024-10-21 13:50:26 -07:00
  • b3c328b1be tensor: Assert minimum response queue depth with doc Hansung Kim 2024-10-18 23:11:19 -07:00
  • e946403d78 tensor: Fix typo, reduce resp queue depth Hansung Kim 2024-10-18 22:54:48 -07:00
  • 0aadc6074a tensor: Decouple A and B access states Hansung Kim 2024-10-18 22:42:41 -07:00
  • c0292dd0aa tensor: Enlarge operand buffer for A for better SMEM reuse Hansung Kim 2024-10-18 21:51:34 -07:00
  • 93c9bcc32f tensor: Stage B as well for full throughput Hansung Kim 2024-10-18 20:12:15 -07:00
  • c4b5a11fde tensor: Replace staging logic for A with FillBuffer Hansung Kim 2024-10-18 19:54:20 -07:00
  • 7fab6f89ad tensor: Properly route FillBuffer to DPU Hansung Kim 2024-10-18 17:33:55 -07:00
  • 91d9897c27 tensor: Write FillBuffer for tile buffering Hansung Kim 2024-10-18 17:17:41 -07:00
  • c2f39f7474 tensor: Rename substepExecute Hansung Kim 2024-10-18 16:21:43 -07:00
  • 64ea48ace3 tensor: Consider data reuse for B memory request Hansung Kim 2024-10-18 13:46:04 -07:00
  • a2519da58f tensor: SMEM address generation Hansung Kim 2024-10-17 16:36:18 -07:00
  • 2741af0b2b tensor: Keep set/step in the tag writeback queue Hansung Kim 2024-10-17 15:43:44 -07:00
  • 7de8e86d4f tensor: Sync rd with DPU using a queue Hansung Kim 2024-10-17 15:18:47 -07:00
  • ffdabf9184 add tag to tc smem interface, bump vortex Richard Yan 2024-10-17 14:49:11 -07:00