Commit Graph

462 Commits

Author SHA1 Message Date
Richard Yan
9b0aa387c3 Merge branch 'main' of https://github.com/ucb-bar/radiance into main 2024-02-02 15:55:17 -08:00
Richard Yan
f3cee5abff enable gpu to use separate physical memory range 2024-02-02 15:55:02 -08:00
Hansung Kim
2fcb1f374f Rename to RadianceTile.scala 2024-02-01 14:42:43 -08:00
Richard Yan
20191a9253 Merge branch 'main' of https://github.com/hansungk/radiance into main 2024-01-31 13:13:55 -08:00
Richard Yan
e20799a7e1 make shared memory use external spad 2024-01-31 13:13:06 -08:00
Hansung Kim
2aab555f0a Connect unified_mem_node from Gemmini 2024-01-30 18:01:32 -08:00
Hansung Kim
a648b388ef Bump radpie 2024-01-30 18:01:19 -08:00
Hansung Kim
dc86d69da4 Add make fragment 2024-01-29 15:40:15 -08:00
Hansung Kim
2c7d8650d4 Bump radpie 2024-01-29 13:58:34 -08:00
Hansung Kim
149f8b193e Add memfuzzer DPI library as submodule 2024-01-29 13:18:58 -08:00
Hansung Kim
16c4292e57 Rename core.io.cease to finished; bump vortex 2024-01-26 14:25:12 -08:00
Hansung Kim
cfce029b70 Generate explicit clock domain in CanHaveMemtraceCore 2024-01-26 00:13:14 -08:00
Hansung Kim
78075e5148 Bump vortex 2024-01-25 23:24:05 -08:00
Hansung Kim
df26764fc0 Reduce sharedmem addr mapping to 8KB
smem size is set to 16KB, and reqs exceeding this range gets filtered
out of smemNodes from inside the core.  Lower 8KB is mapped to smem
banks, and upper 8KB is reserved for MMIO.
2024-01-23 22:15:40 -08:00
Hansung Kim
17553ccfcd Connect stlNode of Gemmini 2024-01-23 18:58:03 -08:00
Hansung Kim
2e5f6d8427 Support RoCC instantiation in VortexTile 2024-01-23 16:24:55 -08:00
Hansung Kim
d2032b563c Don't set XLen in WithRadianceCores
Currently Vortex core uses hardcoded 32-bit xlen in its RTL.  Also, setting this
here breaks instantiating Gemmini, which assumes 64bit.  So just leave it
unchanged and try to treat Vortex as a special-case.
2024-01-23 16:11:32 -08:00
Hansung Kim
34fce0e34d Commented out TLRAMCoalescerFuzzer test module 2024-01-23 13:47:22 -08:00
Hansung Kim
164e722790 Pass inflight to DPI to determine proper fuzz termination 2024-01-23 01:11:52 -08:00
Hansung Kim
f26c9dfb11 Put pipereg between uncoalescer output and respQueue
... to break the combinational loop resulting from MultiPortQueue's
enq.ready port being dependent on enq.valid.  This seems to manifest
only when time-coalescing is enabled.
2024-01-22 17:34:34 -08:00
Hansung Kim
75d51e3d1d Distinguish time-coalescing window from request queue depth 2024-01-22 14:39:34 -08:00
Hansung Kim
b2a83c788e Pass both A and D bundles to memfuzzer DPI 2024-01-22 01:54:45 -08:00
Hansung Kim
e7340ba840 Use negedge for DPI calls to avoid confusion 2024-01-22 01:51:35 -08:00
Hansung Kim
a499dfff32 Enable conditional instantiation of coalescer in FuzzerTile 2024-01-22 01:43:09 -08:00
Hansung Kim
80414964f0 Remove unnecessary id.bits from SourceGenerator table row 2024-01-22 01:41:24 -08:00
Hansung Kim
ec02a12220 Use DecoupledIO instead of explicit valid in TraceLine bundle 2024-01-21 17:50:00 -08:00
Hansung Kim
d56981a0b1 Fix io.finished of MemTraceDriver not waiting for inflight responses 2024-01-21 15:33:15 -08:00
Hansung Kim
e183606193 Write basic DPI mem fuzzer 2024-01-20 21:47:06 -08:00
Hansung Kim
6ff127eb51 Write faux memory fuzzer 2024-01-19 22:37:44 -08:00
Hansung Kim
9e7a8f4ef2 Add FuzzerTile
This tile is similar to TraceGenTile in rocket-chip, where each tile
contains a memtrace generator/fuzzer that drives the intra-tile
coalescer and the rest of the memory subsystem.
2024-01-19 22:05:21 -08:00
Hansung Kim
69bf554d0f Split SimMem verilog constants to a .vh file 2024-01-19 18:25:03 -08:00
Hansung Kim
40ec2a276b Remove unittest configs carried over from rocket-chip 2024-01-19 18:24:22 -08:00
Hansung Kim
ceb7ee79fe Don't gitignore *.v 2024-01-19 16:09:41 -08:00
Hansung Kim
737f24fd77 scalafmt 2024-01-19 15:16:37 -08:00
Hansung Kim
fec3d61dd6 Decrease imemSourceWidth to 4 2024-01-18 22:16:22 -08:00
Hansung Kim
0fd4d0a76f Split IO for lookup and dealloc in InflightTable
The usage of `lookup` and `lookupSourceId` ports were being conflated in
terms of table lookup and dealloc.  Now `lookupSourceId` solely controls
lookup operation and vice versa.  This simplifies pipeline reg logic in
uncoalescer.
2024-01-18 22:10:06 -08:00
Hansung Kim
9ae1d9c392 Put a pipeline stage at uncoalescer
... to cut timing after inflight table lookup & before
splitting/enqueueing logic.
2024-01-18 21:34:02 -08:00
Hansung Kim
7e906a39fb Reduce default respQueueDepth to 2 2024-01-18 19:22:59 -08:00
Hansung Kim
95dcecbe03 Fix uncoalesced response being dropped
Need to use fire instead of valid so that the uncoalescing /
inflighttable freeing logic happens exactly once at the fire time.

FIXME: might result in long ready chain that goes from TL-D port all the
way to the response queues.
2024-01-18 18:50:43 -08:00
Hansung Kim
b1a37d0dda Streamline upstream flow with regards to CoalSourceGen
CoalescerSourceGen was prematurely reclaiming sourceIds in the presence
of coalResp backpressure, since it was not referring to coalResp.fire
and instead setting ready to always-true.  With this change
CoalSourceGen properly propagates both downstream and upstream
backpressure.
2024-01-18 18:15:18 -08:00
Hansung Kim
086b2a5398 Clean up uncoalescer -> respQueue doc 2024-01-18 18:12:49 -08:00
Hansung Kim
46f5e8b920 Disable force assert for RespQueue block 2024-01-18 18:10:33 -08:00
Hansung Kim
2b8ef4cb30 Create coalResp backpressure when response queues are full
... which causes the uncoalescer to lock up, so we shouldn't accept
further coalescer responses.
2024-01-18 01:09:28 -08:00
Hansung Kim
eeb92da8a1 Fix InFlightTable lookup assert 2024-01-18 01:07:49 -08:00
Hansung Kim
e96836c190 Fix inflightCounter debug counter 2024-01-18 01:06:28 -08:00
Hansung Kim
138e83b68a Assert coreWriteReqQueue is never full in VortexCache 2024-01-18 01:05:23 -08:00
Richard Yan
e53c3fed9b add back purged files 2024-01-17 16:40:13 -08:00
Hansung Kim
7914607304 Bump vortex with IBUF/LSUQ size change 2024-01-16 23:54:39 -08:00
Hansung Kim
37d2af5478 Reflect upstream rocket-chip changes
* hartId -> tileId
* TileCrossingParamsLike -> HierarchicalElementCrossingParamsLike
* don't use bus_error_unit
2024-01-16 23:44:57 -08:00
Hansung Kim
cd1022c608 Remove use of HasTiles to reflect upstream change 2024-01-16 22:59:56 -08:00