Jerry Zhao
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2077e4304d
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Explicitly provide refClockFreqMHz to harnessClockInstantiator
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2023-05-13 11:18:03 -07:00 |
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Jerry Zhao
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b8e95e0305
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Rename implicit clock/reset to referenceclock/reset
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2023-05-12 15:11:44 -07:00 |
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Jerry Zhao
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94d471bd9a
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Set firesim harnessbinder freq to 1000 MHz by default
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2023-05-12 14:44:07 -07:00 |
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Jerry Zhao
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85bb945555
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Fix bug in cospike
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2023-05-12 11:34:31 -07:00 |
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Jerry Zhao
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7ae43a1829
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Fix tracegenconfig
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2023-05-12 10:51:34 -07:00 |
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Jerry Zhao
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b42a3d4896
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Make Passthrough clock assert more verbose
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2023-05-12 10:51:27 -07:00 |
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Jerry Zhao
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607c2b5a73
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Unify multi-node btw chipyard/firechip | unify harness clocking
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2023-05-12 08:41:34 -07:00 |
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Hansung Kim
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7ed3d294c8
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Add WithCoalescer to SoC config
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2023-05-12 01:20:23 -07:00 |
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Jerry Zhao
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0cbca54e19
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Remove TestChipBusFreqs (this is ChipLikeRocketConfig)
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2023-05-12 00:03:36 -07:00 |
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Hansung Kim
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dc4b8bd615
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Bump rocket-chip
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2023-05-11 18:53:54 -07:00 |
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Jerry Zhao
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64ad77bbcf
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Make FPGA flows use the harnessClockInstantiator
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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a9bc11accb
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Update comments on harnessbinders in AbstractConfig
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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1a6b34696e
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Set a more realistic 500 MHz uncore clock:
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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4dd017d181
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Fix WithClockAndResetFromHarness to actually request harness clocks
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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f4bf1b0a28
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Fix multiclockrocketconfig
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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624785376a
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Fix PassThroughClockGenerator to handle multiclock properly
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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ffc4d1f662
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Use getClass.getSimpleName for ClockSourceAtFreqMHz blackbox inline
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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1916d3e4fc
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Add timeunit to ClockSourceAtFreqMHz
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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bcd273986f
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Fix ClockSourceAtFreqMHz period calc
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2023-05-11 15:04:03 -07:00 |
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Jerry Zhao
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5c8ea080ee
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Switch to our own ClockSourceAtFreq that is verilator-compatible
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2023-05-11 15:04:03 -07:00 |
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Jerry Zhao
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71fe1ad858
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Switch RTL sims to absolute clock-generators
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2023-05-11 15:04:03 -07:00 |
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Jerry Zhao
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c148f1daf1
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Make BootAddrReg optional
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2023-05-10 11:44:03 -07:00 |
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Jerry Zhao
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fbfb518b72
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Merge remote-tracking branch 'origin/main' into renameserial
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2023-05-10 11:39:11 -07:00 |
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Sagar Karandikar
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1c10f75622
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Merge pull request #1471 from ucb-bar/lowmem-configs
Add 1GB / 4GB DRAM firechip configs for FireSim VCU118
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2023-05-10 11:32:01 -07:00 |
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Sagar Karandikar
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abe8a7fb8b
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remove extra newlines
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2023-05-10 11:31:05 -07:00 |
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Hansung Kim
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afbb67f934
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Bump rocket-chip
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2023-05-10 01:24:28 -07:00 |
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Hansung Kim
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013782a5db
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Update path to WithMemtraceCore
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2023-05-09 22:23:36 -07:00 |
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Jerry Zhao
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94f83e319a
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Fix bugs in spike-cosim
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2023-05-09 17:39:48 -07:00 |
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abejgonzalez
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2997cddc0e
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Merge remote-tracking branch 'origin/main' into bump-verilator
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2023-05-09 13:27:13 -07:00 |
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Hansung Kim
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58f3fc221c
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Bump rocket-chip to reflect memtrace config update
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2023-05-09 13:10:14 -07:00 |
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Hansung Kim
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87b64575f8
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Refactor memtrace SoC configuration
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2023-05-09 13:08:49 -07:00 |
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Jerry Zhao
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eced8e63d9
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Rename SerialAdapter+SimSerial to TSIToTileLink/SimTSI/TSIHarness
|
2023-05-08 18:19:18 -07:00 |
|
Sagar Karandikar
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95da9cefb5
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4GB DRAM configs
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2023-05-08 13:41:51 -07:00 |
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Jerry Zhao
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ac281daa78
|
Move TestHarness to chipyard.harness, make chipyard/harness directory
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2023-05-08 08:00:56 -07:00 |
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Jerry Zhao
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4f5bbdca97
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Flip serial_tl.clock for firechip BridgeBinders
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2023-05-07 22:22:37 -07:00 |
|
Jerry Zhao
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9566667767
|
Remove bus-to-bus crossings
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2023-05-07 22:22:37 -07:00 |
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Jerry Zhao
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5f076b184d
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Flip serial_tl_clock to be generated off-chip
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2023-05-07 22:22:36 -07:00 |
|
Jerry Zhao
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4eb0f81c16
|
Bump testchipip
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2023-05-07 16:02:23 -07:00 |
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Jerry Zhao
|
954dab1638
|
Merge remote-tracking branch 'origin/main' into tcdtm
|
2023-05-07 15:56:55 -07:00 |
|
Sagar Karandikar
|
40d0a1f3bd
|
low mem configs
|
2023-05-07 11:47:14 -07:00 |
|
Jerry Zhao
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2271194131
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Merge remote-tracking branch 'origin/main' into bump-fs
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2023-05-06 19:26:20 -07:00 |
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Jerry Zhao
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257e7d7507
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Check that HarnessClockInstantiator doesn't receive requests for similarly-named-clocks with different frequencies (#1460)
|
2023-05-05 17:09:07 -07:00 |
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Hansung Kim
|
774c9cb789
|
Bump rocket-chip after upstream/master merge
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2023-05-05 14:51:36 -07:00 |
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Hansung Kim
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03350cfafe
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Update import path to cde to reflect upstream changes
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2023-05-05 14:47:45 -07:00 |
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Hansung Kim
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c9762296ca
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Merge remote-tracking branch 'upstream/main' into graphics
|
2023-05-05 14:40:55 -07:00 |
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Jerry Zhao
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b8ccb7d4f6
|
Support not instantiating the TileClockGater/ResetSetter PRCI controllers (#1459)
|
2023-05-04 17:15:38 -07:00 |
|
Jerry Zhao
|
b05f36df79
|
Fix support for no-bootROM systems (#1458)
|
2023-05-03 18:23:36 -07:00 |
|
Jerry Zhao
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1cc5ea5192
|
Fix no-uart configs (#1457)
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2023-05-03 18:23:16 -07:00 |
|
Jerry Zhao
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a299dae1a5
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Initialize cospike memory from SimDRAM memory
|
2023-05-01 09:28:55 -07:00 |
|
Hansung Kim
|
9301243a03
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Bump rocket-chip
|
2023-04-28 01:40:53 -07:00 |
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