wu-arch/vortex
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Commit Graph

  • ac2242b51f minor update Blaise Tine 2021-01-07 00:18:10 -08:00
  • 4eb85dd97a minor update Blaise Tine 2021-01-06 23:37:24 -08:00
  • ba1082249a minor update Blaise Tine 2021-01-06 23:30:30 -08:00
  • 82fa3b850e minor update Blaise Tine 2021-01-06 22:31:25 -08:00
  • 8aea9cbe07 minor update Blaise Tine 2021-01-06 21:39:15 -08:00
  • 146c285aa0 minor update Blaise Tine 2021-01-06 19:59:04 -08:00
  • 2b8435471a speeding up simulation using dedicated full dpi-based FPU core Blaise Tine 2021-01-06 18:44:06 -08:00
  • 2058718f0f minor updates Blaise Tine 2021-01-06 07:18:14 -08:00
  • 31ff70fd4e minor updates Blaise Tine 2021-01-05 15:03:41 -08:00
  • 846a4036d3 minor update Blaise Tine 2021-01-05 05:46:20 -08:00
  • 39bff921be cache bug fixes Blaise Tine 2021-01-05 05:04:49 -08:00
  • 762b8e2e3e fixed cache mshr critical path Blaise Tine 2021-01-04 12:49:40 -05:00
  • 9a077b97f3 Merge branch 'master' of https://github.gatech.edu/casl/Vortex Blaise Tine 2021-01-03 23:11:06 -05:00
  • 4d55118545 cache pipeline optimization - moved tag access to stage0 Blaise Tine 2021-01-03 23:10:41 -05:00
  • 4bc3b537bd fixed reset fan-out Blaise Tine 2021-01-03 20:06:36 -08:00
  • 9cef1aae04 cache fill response address is the mshr's top address, no need to store it Blaise Tine 2021-01-03 00:57:24 -05:00
  • 4815ab099c using single-port block ram for cache tags, restoring core reset signal Blaise Tine 2021-01-02 19:53:41 -08:00
  • a766c16ac9 opencl kernels update Blaise Tine 2021-01-02 16:49:06 -05:00
  • a825941f51 Merge branch 'master' of https://github.gatech.edu/casl/Vortex Blaise Tine 2021-01-02 16:06:09 -05:00
  • 2d69ca5d67 scratchpad optimization for stack access using custom bank offset aligned to stack size Blaise Tine 2021-01-02 16:00:00 -05:00
  • 93c36273fa minor update Blaise Tine 2021-01-01 20:24:18 -08:00
  • da9649c2a3 fixed pipe register reset issue in synthesis Blaise Tine 2021-01-01 14:54:18 -08:00
  • c5cf494e72 Merge branch 'master' of https://github.gatech.edu/casl/Vortex Blaise Tine 2021-01-01 11:46:45 -08:00
  • 36602cfa6a buffering core reset signal Blaise Tine 2021-01-01 11:46:30 -08:00
  • 30d950ada2 vx_spawn_warps redesign using opencl's style scheduler Blaise Tine 2021-01-01 14:13:48 -05:00
  • 138db29310 Merge branch 'master' of https://github.gatech.edu/casl/Vortex Blaise Tine 2020-12-31 22:40:34 -05:00
  • e4a00dd0d9 fixed loader script stack setup Blaise Tine 2020-12-31 22:37:20 -05:00
  • b2cfde5d6d enabling shared memory back Blaise Tine 2020-12-31 19:19:14 -08:00
  • 0c9065e6b2 Merge branch 'master' of https://github.gatech.edu/casl/Vortex Blaise Tine 2020-12-31 10:20:21 -08:00
  • e757a0e333 update opencl kernel Blaise Tine 2020-12-31 13:19:26 -05:00
  • abe32ed553 cache optimization - moved read requests to stage1 and eliminating stage3 Blaise Tine 2020-12-31 07:40:58 -08:00
  • 9f128085d5 scoreboard optimization - using writeback's end-of-packet status Blaise Tine 2020-12-30 06:47:56 -08:00
  • e431162347 minor update Blaise Tine 2020-12-30 04:09:21 -08:00
  • d44144f72f FPU float<->int conversion optimization Blaise Tine 2020-12-29 15:37:45 -08:00
  • e83c4638a0 FPU area optimization sharing fmadd hard block Blaise Tine 2020-12-27 17:31:10 -08:00
  • 25df233005 Adding Altera Stratix 10 support Blaise Tine 2020-12-27 10:44:57 -08:00
  • b2b8f190dd minor update Blaise Tine 2020-12-26 14:47:41 -08:00
  • 33c431ed44 multiplier unit optimization - using fifo for metadata, shift register optimization Blaise Tine 2020-12-26 11:23:21 -08:00
  • b459192dec critical path optimization - fpga fmax @4c = ~212 mhz Blaise Tine 2020-12-26 03:28:32 -08:00
  • d5c6b9b4d9 Merge branch 'master' of https://github.gatech.edu/casl/Vortex Blaise Tine 2020-12-24 19:36:29 -05:00
  • 4f689c4ce9 fixed global obejct sharing between cores Blaise Tine 2020-12-24 19:36:07 -05:00
  • 3fdc49971c minor update Blaise Tine 2020-12-24 09:22:44 -08:00
  • 703a861fe9 added support for write-through cache, removed cache snooping support Blaise Tine 2020-12-23 23:51:02 -08:00
  • d956e268b9 adding new performance counters (banks utilization and DRAM bus utilization) Blaise Tine 2020-12-22 12:33:45 -08:00
  • 4b7d871d62 allowing partial cache request submissions, io bus support broken Blaise Tine 2020-12-21 03:53:13 -08:00
  • 4bbd7bf408 performance refactoring - rebalanced stream buffers accross the device to enforce output buffering rule at compoments boudaries, finally resolved block ram R/W collusion discrepencies, Blaise Tine 2020-12-19 02:45:06 -08:00
  • 29cd2f5dff fixed register file initialization to zero synthesis inference Blaise Tine 2020-12-10 00:27:56 -08:00
  • 3e9abb978b fixed typo Blaise Tine 2020-12-09 13:03:22 -08:00
  • fe07ca9aee minor update Blaise Tine 2020-12-09 05:49:02 -08:00
  • e0905f8352 minor update Blaise Tine 2020-12-09 05:34:27 -08:00
  • d81ce8b609 minor update Blaise Tine 2020-12-09 00:57:31 -08:00
  • 12f7fcfa75 adding missing files, buffering teh snoop forwarder Blaise Tine 2020-12-09 00:24:32 -08:00
  • 0d595bae3c minor update Blaise Tine 2020-12-08 21:44:51 -08:00
  • 707ba3760f minor update Blaise Tine 2020-12-08 21:37:53 -08:00
  • d5438fd591 merging perf counters Blaise Tine 2020-12-08 21:02:39 -08:00
  • 14baec86d5 moved apae sources into rtl/afu Blaise Tine 2020-12-08 04:59:11 -08:00
  • d5fa82f5e4 cache req datapath optimizations Blaise Tine 2020-12-08 02:58:08 -08:00
  • 1595ff08e2 PERF pipeline stalls and cache Xandy Liu 2020-12-08 01:14:41 -05:00
  • 268ad15098 minor update Blaise Tine 2020-12-06 22:55:17 -08:00
  • 5074038ad6 minor update Blaise Tine 2020-12-06 22:41:14 -08:00
  • d68b32cd60 minor update Blaise Tine 2020-12-06 22:40:27 -08:00
  • 0d0706411d CSR IO's critical path elimination Blaise Tine 2020-12-06 16:07:36 -08:00
  • dada72f830 minor update Blaise Tine 2020-12-06 15:28:58 -08:00
  • 1332970636 refactoring cores clustering Blaise Tine 2020-12-06 14:42:12 -08:00
  • b2652527bb data/dram bus refactoring Blaise Tine 2020-12-06 03:37:22 -08:00
  • d0f2a3984d adding input buffering to bus arbiters to reduce backpressure delay propagation Blaise Tine 2020-12-05 17:31:29 -08:00
  • 13a5370254 register file refactoring Blaise Tine 2020-12-05 01:40:50 -08:00
  • 478d971389 minor update Blaise Tine 2020-12-03 16:21:20 -08:00
  • fb60d0af87 decoupled load/store commits Blaise Tine 2020-12-03 15:08:48 -08:00
  • c3ec4c9e90 minor update Blaise Tine 2020-12-03 09:30:59 -08:00
  • 0a8f41964d minor update Blaise Tine 2020-12-03 08:47:03 -08:00
  • b7a724410b update DRAM simulation - reduce the latency of duplicate requests (simulate DRAM cache) Blaise Tine 2020-12-03 07:30:19 -08:00
  • f3b1069ce8 adding stream arbiter Blaise Tine 2020-12-03 06:40:23 -08:00
  • f575f16f57 minor update Blaise Tine 2020-12-01 12:57:02 -08:00
  • b677f724aa Use skid buffer on CSR IO bus to stop backpressure delay propagation into csr_unit Blaise Tine 2020-12-01 12:37:15 -08:00
  • 84a9f1e2d7 minor update Blaise Tine 2020-12-01 12:00:05 -08:00
  • 74c9e9ad1f minor update Blaise Tine 2020-12-01 10:42:14 -08:00
  • 26b5bd10b3 minor update Blaise Tine 2020-12-01 10:07:26 -08:00
  • f9d98c5a2b fixed bank_core_req_arb critical path. Blaise Tine 2020-12-01 08:43:59 -08:00
  • f68af3bb84 using mshr pending request size Blaise Tine 2020-12-01 00:54:25 -08:00
  • 97739e9dcf RAM blocks inference fixes Blaise Tine 2020-11-30 14:02:47 -08:00
  • 5758ef9ebf generic_register reset network optimization Blaise Tine 2020-11-29 18:41:36 -08:00
  • def6a35693 shared memory optimization Blaise Tine 2020-11-29 15:04:31 -08:00
  • b85391389b rename MSRQ to MSHR Blaise Tine 2020-11-28 17:32:00 -05:00
  • ac1883a13f tabs cleanup Blaise Tine 2020-11-28 17:08:01 -05:00
  • 00d7473268 build warnings clean Blaise Tine 2020-11-28 14:59:13 -05:00
  • 0c3d91ee6d minor update Blaise Tine 2020-11-28 03:22:11 -05:00
  • 457f831435 fixed scoreboard stall Blaise Tine 2020-11-28 03:14:20 -05:00
  • 461be0880d fixed FPU-CSR data dependence Blaise Tine 2020-11-25 09:05:38 -08:00
  • 71b98b166c minor update Blaise Tine 2020-11-24 07:10:02 -08:00
  • c04d385641 minor update Blaise Tine 2020-11-23 20:12:04 -08:00
  • eb307edd9c minor update Blaise Tine 2020-11-23 17:34:06 -08:00
  • 664ce28426 minor update Blaise Tine 2020-11-23 12:21:39 -08:00
  • a7cd991c87 Merge branch 'master' of https://github.gatech.edu/casl/Vortex Blaise Tine 2020-11-23 12:08:48 -08:00
  • f4ed1e97f7 minor update Blaise Tine 2020-11-23 12:08:31 -08:00
  • 2d4fef6dd6 fixed fp_noncomp bug, ci toolchain script update, increased DRAM latency to 100 cycles Blaise Tine 2020-11-23 11:59:40 -08:00
  • 7a7011d5c6 minor update (trace log) Blaise Tine 2020-11-23 14:29:35 -05:00
  • e281d32138 travis timeout workaround Blaise Tine 2020-11-22 19:07:46 -08:00
  • 23cf72d7f4 travis timeout workaround Blaise Tine 2020-11-22 14:28:46 -08:00
  • f9e1e11dc5 travis timeout workaround Blaise Tine 2020-11-22 12:41:58 -08:00