wu-arch/vortex
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Commit Graph

  • b8b3267757 FPGA guide format edit Malik Aki Burton 2021-03-01 13:00:06 -05:00
  • f2e0fd22c3 Edited Flubber FPGA guide to have build configuration section Malik Aki Burton 2021-03-01 12:57:36 -05:00
  • 68ba648b8a Merge branch 'master' of https://github.com/vortexgpgpu/vortex-dev Blaise Tine 2021-03-01 09:22:59 -05:00
  • 5e3a949d2d floating-point conversion fix Blaise Tine 2021-03-01 06:11:03 -08:00
  • b023496ecb minor update Blaise Tine 2021-03-01 03:00:58 -08:00
  • c8af5a8f45 minor update Blaise Tine 2021-03-01 02:56:58 -08:00
  • ad06408044 minor update Blaise Tine 2021-03-01 01:51:25 -08:00
  • 0e3872ee94 floating-point CSR fix Blaise Tine 2021-03-01 01:46:41 -08:00
  • b441870789 rename use_imm and use_PC Blaise Tine 2021-03-01 00:38:46 -08:00
  • 013dab4aeb Merge branch 'master' of https://github.gatech.edu/casl/Vortex Blaise Tine 2021-02-28 19:12:30 -08:00
  • 41f09ffb55 minor update - allow independent driver cleanup Blaise Tine 2021-02-28 18:19:26 -08:00
  • a9cb0b4ec1 minor update - asesim fix Blaise Tine 2021-02-28 17:30:21 -08:00
  • e6bb8ccd94 Merge branch 'master' of https://github.gatech.edu/casl/Vortex Blaise Tine 2021-02-28 17:21:19 -08:00
  • c856cac8be Merge branch 'master' of https://github.gatech.edu/casl/Vortex Blaise Tine 2021-02-28 20:14:42 -05:00
  • de0298ca47 fsqrt replacement to newlib emulation Blaise Tine 2021-02-28 20:12:56 -05:00
  • e3a11e4a5c minor fix Blaise Tine 2021-02-28 14:18:43 -08:00
  • 3f5fd6d394 using shiftreg-based skid buffers Blaise Tine 2021-02-28 02:20:09 -08:00
  • e64996946d using 44-bit perf counters - aligned with DSP counters width Blaise Tine 2021-02-28 02:05:47 -08:00
  • 9fda618815 minor typo Blaise Tine 2021-02-28 01:58:41 -08:00
  • 8a9a67aa5a minor update Blaise Tine 2021-02-27 21:54:55 -08:00
  • f5a17bd1a9 decode optimization and refactoring Blaise Tine 2021-02-27 18:21:41 -08:00
  • ebee332e9d minor update Blaise Tine 2021-02-27 02:31:05 -08:00
  • 20d704b4d3 skid buffer optimization Blaise Tine 2021-02-27 02:29:48 -08:00
  • a8452483fe simX refactoring Blaise Tine 2021-02-27 02:27:19 -08:00
  • 4fe345f269 adding floating extension to SimX Blaise Tine 2021-02-24 14:25:04 -08:00
  • 34ce0b8e89 minor update Blaise Tine 2021-02-23 20:54:03 -08:00
  • 700f9eea19 moving MUL unit into ALU unit Blaise Tine 2021-02-23 13:49:02 -08:00
  • 89e8629542 Added Build Progress and Build Script Config sections to the Flubber FPGA Startup guide Malik Aki Burton 2021-02-23 10:09:31 -05:00
  • 1792571e1b minor update Blaise Tine 2021-02-22 13:30:45 -08:00
  • 1346d64ba9 minor update Blaise Tine 2021-02-22 04:04:13 -08:00
  • f63ef8110c update opencl kernels Blaise Tine 2021-02-22 00:59:39 -05:00
  • 7560202f8b cache bank refactoring - removing unecessary core response fifo & restoring single port data access Blaise Tine 2021-02-21 21:47:46 -08:00
  • ccb74ef286 cache data access with decoupled read/write ports Blaise Tine 2021-02-21 15:18:24 -08:00
  • 3e961c4e6e minor update Blaise Tine 2021-02-21 15:14:46 -08:00
  • 6739dc7923 minor update - registering execute units skid buffers Blaise Tine 2021-02-21 15:11:08 -08:00
  • 4a5f4fe64e Created Flubber FPGA Startup .md file Malik Aki Burton 2021-02-21 12:23:32 -05:00
  • f27c1fac5f minor update Blaise Tine 2021-02-21 03:38:24 -08:00
  • 6d7692da37 minor fix. Blaise Tine 2021-02-21 03:37:36 -08:00
  • 258eb633a6 minor update Blaise Tine 2021-02-20 13:16:25 -08:00
  • 05f93fac20 minor update Blaise Tine 2021-02-20 13:15:15 -08:00
  • 143319d557 minor optimization Blaise Tine 2021-02-18 16:03:16 -08:00
  • 31b3e380dc minor update Blaise Tine 2021-02-15 09:23:40 -08:00
  • 9eed48435c instruction decode optimization Blaise Tine 2021-02-14 00:19:54 -08:00
  • 3c37db877a cache specialization for in-order DRAM reponses Blaise Tine 2021-02-13 20:23:29 -08:00
  • 4aaaebab6e minor update Blaise Tine 2021-02-12 10:18:57 -08:00
  • 073964fdf7 minor update Blaise Tine 2021-02-12 08:52:06 -08:00
  • ab63ac9e5d cache request interfaces update Blaise Tine 2021-02-10 20:55:04 -08:00
  • 665b97b810 multi-ported cache support for streaming Blaise Tine 2021-02-08 16:13:32 -08:00
  • fd1726197b cache merge optimization Blaise Tine 2021-02-07 07:33:39 -08:00
  • 6c1dc96626 simX refactoring + removed oldRTL + CSR updates Blaise Tine 2021-02-06 12:52:54 -08:00
  • 111cc29482 minor update Blaise Tine 2021-02-04 15:28:04 -08:00
  • 778453e43f remove unused code from kernel binaries, spawn_kernel optimization using shift instead of division Blaise Tine 2021-02-04 17:35:57 -05:00
  • 3837638a85 Merge branch 'master' of https://github.gatech.edu/casl/Vortex Blaise Tine 2021-02-04 15:15:41 -05:00
  • b047f589d6 runtime instrinsics refactoring using RISC-V custom instruction assmebly directives Blaise Tine 2021-02-04 15:15:20 -05:00
  • 6a6711b735 minor update Blaise Tine 2021-02-04 09:11:46 -08:00
  • 72b6713a72 updating fdiv/fsqrt bram hex files, reset_delay updaet Blaise Tine 2021-02-04 09:02:18 -08:00
  • 32b94f61f2 minor update Blaise Tine 2021-02-01 11:00:09 -08:00
  • 62ff97d6e1 minor update - smem perf update Blaise Tine 2021-02-01 10:29:20 -08:00
  • dc18bfabb8 minor update - remove mshr data store Blaise Tine 2021-01-30 06:40:48 -08:00
  • a9f82bceae updating kernels with 32-cores support Blaise Tine 2021-01-25 10:33:42 -05:00
  • 3602d287b4 wspawn fix for small sets Blaise Tine 2021-01-25 07:04:54 -08:00
  • de2e118cc2 move opae to /hw/syn/ Blaise Tine 2021-01-25 02:32:49 -08:00
  • 5419859281 fcvt fix Blaise Tine 2021-01-25 02:22:00 -08:00
  • 8775f63ec4 lkg build rollout with 16cores optimization on arria10 Blaise Tine 2021-01-24 16:49:22 -08:00
  • 74a687e395 minor updates Blaise Tine 2021-01-18 05:43:30 -08:00
  • b17f1109c6 minor updates Blaise Tine 2021-01-18 04:34:34 -08:00
  • ce9ef840d6 minor updates Blaise Tine 2021-01-18 04:22:40 -08:00
  • 9bce15a513 minor updates Blaise Tine 2021-01-17 18:20:02 -08:00
  • a7f6b9fffc minor updates Blaise Tine 2021-01-17 18:18:05 -08:00
  • 1237a72536 minor updates Blaise Tine 2021-01-17 18:11:42 -08:00
  • 8b42393189 minor updates Blaise Tine 2021-01-17 17:33:41 -08:00
  • a046bd7a73 cache pipeline optimization Blaise Tine 2021-01-17 17:19:52 -08:00
  • ed216ab39d minor updates Blaise Tine 2021-01-17 13:58:43 -08:00
  • 98945df5ae minor updates Blaise Tine 2021-01-17 12:50:07 -08:00
  • a69ba5ad7b cache flush support Blaise Tine 2021-01-17 05:50:29 -08:00
  • d4e7b28be8 cache refactoring Blaise Tine 2021-01-17 00:18:56 -08:00
  • 5b80484123 minor updates Blaise Tine 2021-01-16 14:16:10 -08:00
  • a56ecb696d minor updates Blaise Tine 2021-01-16 14:05:47 -08:00
  • 4f26228d50 minor updates Blaise Tine 2021-01-16 05:33:28 -08:00
  • fcbf57b66a specialized shared memory module Blaise Tine 2021-01-16 04:41:58 -08:00
  • ad6e0b4e77 sp_ram byteen fix Blaise Tine 2021-01-15 16:28:03 -08:00
  • 7ae936c25f minor updates Blaise Tine 2021-01-14 23:06:03 -08:00
  • fe64c47f60 ccip write fix Blaise Tine 2021-01-14 22:49:06 -08:00
  • f146178c2d minor updates Blaise Tine 2021-01-13 15:52:03 -08:00
  • 0e1650e1c2 bank deadlock fix Blaise Tine 2021-01-13 15:51:42 -08:00
  • 79cc4d98e6 bank deadlock fix Blaise Tine 2021-01-13 13:06:07 -08:00
  • 464c4f4bd8 minor updates Blaise Tine 2021-01-12 20:16:59 -08:00
  • f18ac24675 afu reset fix Blaise Tine 2021-01-12 17:13:47 -08:00
  • b4b5d6f0ab minor updates Blaise Tine 2021-01-12 15:19:38 -08:00
  • adcd3ad521 minor updates Blaise Tine 2021-01-12 12:06:48 -08:00
  • ceae724207 minor updates Blaise Tine 2021-01-12 11:24:36 -08:00
  • fa5592be22 minor updates Blaise Tine 2021-01-12 03:10:39 -08:00
  • 7c4823e65c fixed GPR reset bug, fixed lsu dup loading, fixed riscv-tests Blaise Tine 2021-01-11 23:55:09 -08:00
  • 50cfc48c0a minor fix Blaise Tine 2021-01-11 02:59:59 -08:00
  • ba743678dc duplicate load addresses optimization Blaise Tine 2021-01-11 01:58:04 -08:00
  • ea2b73d5b0 adding opencl sgemm and vecadd command line options Blaise Tine 2021-01-10 22:47:25 -08:00
  • 7e93d253f2 minor update Blaise Tine 2021-01-10 22:03:23 -08:00
  • e770824d47 fixed afu cci write bug, fixed profile cache write miss bug, fixed bram byteenable inferance Blaise Tine 2021-01-10 20:26:15 -08:00
  • 06945533cf fixed l2/l3 caches related bugs Blaise Tine 2021-01-09 16:32:55 -08:00
  • 5c83c594c1 minor update Blaise Tine 2021-01-07 17:25:59 -08:00