minor update
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@@ -38,11 +38,9 @@ module VX_warp_sched #(
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// wspawn
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reg [31:0] use_wspawn_pc;
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reg [`NUM_WARPS-1:0] use_wspawn;
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reg [31:0] warp_pc;
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reg [`NW_BITS-1:0] warp_to_schedule;
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wire scheduled_warp;
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reg [`NUM_WARPS-1:0] use_wspawn;
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reg [`NW_BITS-1:0] scheduled_warp;
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wire warp_scheduled;
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reg didnt_split;
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@@ -63,8 +61,8 @@ module VX_warp_sched #(
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if (warp_ctl_if.valid && warp_ctl_if.tmc.valid) begin
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schedule_table_n[warp_ctl_if.wid] = (warp_ctl_if.tmc.tmask != 0);
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end
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if (scheduled_warp) begin // remove scheduled warp (round-robin)
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schedule_table_n[warp_to_schedule] = 0;
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if (warp_scheduled) begin // remove scheduled warp (round-robin)
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schedule_table_n[scheduled_warp] = 0;
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end
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end
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@@ -122,9 +120,9 @@ module VX_warp_sched #(
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end
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end
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if (use_wspawn[warp_to_schedule] && scheduled_warp) begin
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use_wspawn[warp_to_schedule] <= 0;
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thread_masks[warp_to_schedule] <= 1;
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if (use_wspawn[scheduled_warp] && warp_scheduled) begin
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use_wspawn[scheduled_warp] <= 0;
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thread_masks[scheduled_warp] <= 1;
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end
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// Stalling the scheduling of warps
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@@ -141,8 +139,8 @@ module VX_warp_sched #(
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end
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// Lock warp until instruction decode to resolve branches
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if (scheduled_warp) begin
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fetch_lock[warp_to_schedule] <= 1;
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if (warp_scheduled) begin
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fetch_lock[scheduled_warp] <= 1;
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end
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if (ifetch_rsp_fire) begin
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fetch_lock[ifetch_rsp_if.wid] <= 0;
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@@ -207,8 +205,9 @@ module VX_warp_sched #(
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// calculate next warp schedule
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reg schedule_valid;
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reg [`NUM_THREADS-1:0] thread_mask;
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reg schedule_valid;
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reg [31:0] warp_pc;
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wire [`NUM_WARPS-1:0] schedule_ready = schedule_table & ~(stalled_warps | total_barrier_stall | fetch_lock);
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@@ -216,13 +215,13 @@ module VX_warp_sched #(
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schedule_valid = 0;
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thread_mask = 'x;
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warp_pc = 'x;
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warp_to_schedule = 'x;
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scheduled_warp = 'x;
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for (integer i = 0; i < `NUM_WARPS; ++i) begin
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if (schedule_ready[i]) begin
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schedule_valid = 1;
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thread_mask = use_wspawn[i] ? `NUM_THREADS'(1) : thread_masks[i];
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warp_pc = use_wspawn[i] ? use_wspawn_pc : warp_pcs[i];
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warp_to_schedule = `NW_BITS'(i);
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scheduled_warp = `NW_BITS'(i);
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break;
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end
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end
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@@ -230,7 +229,7 @@ module VX_warp_sched #(
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wire stall_out = ~ifetch_req_if.ready && ifetch_req_if.valid;
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assign scheduled_warp = schedule_valid && ~stall_out;
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assign warp_scheduled = schedule_valid && ~stall_out;
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VX_pipe_register #(
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.DATAW (1 + `NUM_THREADS + 32 + `NW_BITS),
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@@ -239,17 +238,17 @@ module VX_warp_sched #(
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.clk (clk),
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.reset (reset),
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.enable (!stall_out),
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.data_in ({scheduled_warp, thread_mask, warp_pc, warp_to_schedule}),
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.data_in ({warp_scheduled, thread_mask, warp_pc, scheduled_warp}),
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.data_out ({ifetch_req_if.valid, ifetch_req_if.tmask, ifetch_req_if.PC, ifetch_req_if.wid})
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);
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assign busy = (active_warps != 0);
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`SCOPE_ASSIGN (wsched_scheduled_warp, scheduled_warp);
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`SCOPE_ASSIGN (wsched_scheduled_warp, warp_scheduled);
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`SCOPE_ASSIGN (wsched_active_warps, active_warps);
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`SCOPE_ASSIGN (wsched_schedule_table, schedule_table);
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`SCOPE_ASSIGN (wsched_schedule_ready, schedule_ready);
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`SCOPE_ASSIGN (wsched_warp_to_schedule, warp_to_schedule);
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`SCOPE_ASSIGN (wsched_warp_to_schedule, scheduled_warp);
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`SCOPE_ASSIGN (wsched_warp_pc, warp_pc);
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endmodule
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