Jerry Zhao
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adcb04636d
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Bump cva6
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2023-05-24 22:17:29 -07:00 |
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Jerry Zhao
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300a4b3642
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Add rocketchip unit-tests to regressions
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2023-05-24 10:17:37 -07:00 |
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Jerry Zhao
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6a42c64d3a
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Bump to latest rocket-chip
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2023-05-24 10:17:37 -07:00 |
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Jerry Zhao
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2b67164816
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Merge branch 'main' into unify
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2023-05-24 10:13:07 -07:00 |
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Jerry Zhao
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333df95a42
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Set default config back to 1-channel
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2023-05-23 12:07:28 -07:00 |
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Jerry Zhao
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b69bcffc91
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Merge remote-tracking branch 'origin/main' into unify
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2023-05-19 11:28:52 -07:00 |
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Jerry Zhao
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7184848bf6
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Merge pull request #1476 from ucb-bar/serial-bump
Support uni-directional TLSerdesser
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2023-05-19 11:21:35 -07:00 |
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Jerry Zhao
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76cf492bdf
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Merge pull request #1467 from ucb-bar/jerryz123-patch-2
Generate objdump | check BINARY | cospike fixes
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2023-05-17 16:07:11 -07:00 |
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Jerry Zhao
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abf2af16b4
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Cospike should always include zicntr
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2023-05-17 16:06:24 -07:00 |
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Jerry Zhao
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c2ca66ac4d
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Support ssip interrupts in spike-cosim
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2023-05-17 15:21:11 -07:00 |
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Jerry Zhao
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f4739be632
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Update multi-chip API for harnesses
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2023-05-15 00:03:22 -07:00 |
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Jerry Zhao
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fa91426cf5
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Update comment for AbsoluteFreqHarnessClockInstantiator
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2023-05-14 21:48:38 -07:00 |
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Jerry Zhao
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a207e37725
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Update MultiClockRocket frequencies
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2023-05-14 21:48:18 -07:00 |
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Jerry Zhao
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0223a75f01
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Size down number of concurrent requests allowed on SerialTL
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2023-05-14 18:52:37 -07:00 |
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Jerry Zhao
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d4d81f7d22
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Rename serialManagerParams -> serialTLManagerParams
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2023-05-13 19:25:14 -07:00 |
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Jerry Zhao
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3330c23193
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Support uni-directional TLSerdesser
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2023-05-13 14:14:38 -07:00 |
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Jerry Zhao
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2077e4304d
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Explicitly provide refClockFreqMHz to harnessClockInstantiator
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2023-05-13 11:18:03 -07:00 |
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Jerry Zhao
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b8e95e0305
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Rename implicit clock/reset to referenceclock/reset
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2023-05-12 15:11:44 -07:00 |
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Jerry Zhao
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94d471bd9a
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Set firesim harnessbinder freq to 1000 MHz by default
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2023-05-12 14:44:07 -07:00 |
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Jerry Zhao
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85bb945555
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Fix bug in cospike
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2023-05-12 11:34:31 -07:00 |
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Jerry Zhao
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7ae43a1829
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Fix tracegenconfig
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2023-05-12 10:51:34 -07:00 |
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Jerry Zhao
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b42a3d4896
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Make Passthrough clock assert more verbose
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2023-05-12 10:51:27 -07:00 |
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Jerry Zhao
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607c2b5a73
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Unify multi-node btw chipyard/firechip | unify harness clocking
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2023-05-12 08:41:34 -07:00 |
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Jerry Zhao
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0cbca54e19
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Remove TestChipBusFreqs (this is ChipLikeRocketConfig)
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2023-05-12 00:03:36 -07:00 |
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Jerry Zhao
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64ad77bbcf
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Make FPGA flows use the harnessClockInstantiator
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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a9bc11accb
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Update comments on harnessbinders in AbstractConfig
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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1a6b34696e
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Set a more realistic 500 MHz uncore clock:
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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4dd017d181
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Fix WithClockAndResetFromHarness to actually request harness clocks
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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f4bf1b0a28
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Fix multiclockrocketconfig
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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624785376a
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Fix PassThroughClockGenerator to handle multiclock properly
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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ffc4d1f662
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Use getClass.getSimpleName for ClockSourceAtFreqMHz blackbox inline
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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1916d3e4fc
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Add timeunit to ClockSourceAtFreqMHz
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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bcd273986f
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Fix ClockSourceAtFreqMHz period calc
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2023-05-11 15:04:03 -07:00 |
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Jerry Zhao
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5c8ea080ee
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Switch to our own ClockSourceAtFreq that is verilator-compatible
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2023-05-11 15:04:03 -07:00 |
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Jerry Zhao
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71fe1ad858
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Switch RTL sims to absolute clock-generators
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2023-05-11 15:04:03 -07:00 |
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Jerry Zhao
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c148f1daf1
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Make BootAddrReg optional
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2023-05-10 11:44:03 -07:00 |
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Jerry Zhao
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fbfb518b72
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Merge remote-tracking branch 'origin/main' into renameserial
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2023-05-10 11:39:11 -07:00 |
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Sagar Karandikar
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1c10f75622
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Merge pull request #1471 from ucb-bar/lowmem-configs
Add 1GB / 4GB DRAM firechip configs for FireSim VCU118
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2023-05-10 11:32:01 -07:00 |
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Sagar Karandikar
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abe8a7fb8b
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remove extra newlines
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2023-05-10 11:31:05 -07:00 |
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Jerry Zhao
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94f83e319a
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Fix bugs in spike-cosim
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2023-05-09 17:39:48 -07:00 |
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abejgonzalez
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2997cddc0e
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Merge remote-tracking branch 'origin/main' into bump-verilator
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2023-05-09 13:27:13 -07:00 |
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Jerry Zhao
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eced8e63d9
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Rename SerialAdapter+SimSerial to TSIToTileLink/SimTSI/TSIHarness
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2023-05-08 18:19:18 -07:00 |
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Sagar Karandikar
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95da9cefb5
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4GB DRAM configs
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2023-05-08 13:41:51 -07:00 |
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Jerry Zhao
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ac281daa78
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Move TestHarness to chipyard.harness, make chipyard/harness directory
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2023-05-08 08:00:56 -07:00 |
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Jerry Zhao
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4f5bbdca97
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Flip serial_tl.clock for firechip BridgeBinders
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2023-05-07 22:22:37 -07:00 |
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Jerry Zhao
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9566667767
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Remove bus-to-bus crossings
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2023-05-07 22:22:37 -07:00 |
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Jerry Zhao
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5f076b184d
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Flip serial_tl_clock to be generated off-chip
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2023-05-07 22:22:36 -07:00 |
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Jerry Zhao
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4eb0f81c16
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Bump testchipip
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2023-05-07 16:02:23 -07:00 |
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Jerry Zhao
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954dab1638
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Merge remote-tracking branch 'origin/main' into tcdtm
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2023-05-07 15:56:55 -07:00 |
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Sagar Karandikar
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40d0a1f3bd
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low mem configs
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2023-05-07 11:47:14 -07:00 |
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