Commit Graph

491 Commits

Author SHA1 Message Date
Jerry Zhao
d287fed654 Merge pull request #1495 from ucb-bar/shuttle
Add dual-issue in-order "shuttle" core
2023-06-13 15:29:39 -07:00
Jerry Zhao
a486194d3d Merge branch 'main' into shuttle 2023-06-13 11:01:19 -07:00
Jerry Zhao
d72158ec41 Merge pull request #1486 from nikhiljha/rocc-doc
Add higher level explanations of RoCC + more resources
2023-06-13 10:32:01 -07:00
Jerry Zhao
e4eaa50354 docs: Fix comment on rocc tag bits 2023-06-13 00:57:56 -07:00
Jerry Zhao
903971f32f Add documentation page indicating existence of prefetchers 2023-06-12 16:47:23 -07:00
Jerry Zhao
7995f1de64 Add doc page on shuttle core 2023-06-12 10:10:37 -07:00
abejgonzalez
8e80f078c1 Loosen/tighten conda requirements | Fix conda-lock req 2023-06-02 00:30:08 -07:00
abejgonzalez
4fe974f36b Force conda-lock to v1 2023-05-30 21:09:05 -07:00
Nikhil Jha
8a60b36125 doc: add higher level explanations of RoCC + more resources 2023-05-27 13:44:41 -07:00
Jerry Zhao
a89b86c785 Update HarnessClocking docs 2023-05-12 15:21:27 -07:00
Jerry Zhao
eced8e63d9 Rename SerialAdapter+SimSerial to TSIToTileLink/SimTSI/TSIHarness 2023-05-08 18:19:18 -07:00
Jerry Zhao
ad98363add Update docs/Advanced-Concepts/Harness-Clocks.rst
Co-authored-by: Abraham Gonzalez <abe.j.gonza@gmail.com>
2023-05-08 18:17:20 -07:00
Jerry Zhao
ac281daa78 Move TestHarness to chipyard.harness, make chipyard/harness directory 2023-05-08 08:00:56 -07:00
-T.K.-
3196d44f22 FIX: fix wording in doc
We don't require the host computer to be x86 (can be RISC-V!)
2023-05-07 22:22:37 -07:00
Jerry Zhao
d42b195b91 Add notes to docs indicating SoftCore bringup with VCU118 is legacy 2023-05-07 22:22:37 -07:00
Jerry Zhao
c4bc627cfe Merge pull request #1438 from ucb-bar/tcdtm
ELF-based-loadmem | architectural restartable checkpoints
2023-05-07 22:21:37 -07:00
Jerry Zhao
f01101da4b Remove init-fpga scripts and references, init-submodules now also inits-fpga 2023-05-07 16:03:27 -07:00
Jerry Zhao
4a712a7de5 Add doc page on architectural checkpoints 2023-04-19 20:09:14 -07:00
Jerry Zhao
104a5299a9 Fix typos 2023-04-19 19:52:46 -07:00
Jerry Zhao
7aaa233d73 Switch to LOADMEM=1, LOADARCH=loadarch flags 2023-04-12 17:26:07 -07:00
Jerry Zhao
f28d114f12 Switch to loadmem-by-elf instead of loadmem-by-hex 2023-04-12 17:24:16 -07:00
Abraham Gonzalez
8a7c98c427 Merge pull request #1424 from ucb-bar/new-cfg-finder
New Scala-based Config Finder
2023-04-05 13:41:56 -07:00
Jerry Zhao
4c085ebafc Merge pull request #1399 from ucb-bar/iobinder-qol
QoL improvement to IOBinders + custom ChipTop example
2023-04-05 00:42:54 -07:00
abejgonzalez
a5ee995ed4 New Scala-based Config Finder 2023-04-04 22:58:28 +00:00
Jerry Zhao
2831111134 Mention custom ChipTop in documentation' 2023-04-03 17:31:20 -07:00
abejgonzalez
381a804bf2 Cleanup docs | Bump CI 2023-03-31 10:14:10 -07:00
Jerry Zhao
162ceca9ab Update spike-as-a-tile docs 2023-03-30 23:55:08 -07:00
Harrison Liew
9ef3001ce1 Remove Cadence & Synopsys plugins (#1410)
* remove Cadence & Synopsys plugins from docs and scripts

* update conda-locks
2023-03-21 09:34:38 -07:00
nayiri-k
0ed796484b adding a note about openroad freezing post-detailed_route [skip ci] 2023-03-14 11:18:41 -07:00
nayiri-k
78b6bdb754 Merge branch 'openroad' of https://github.com/ucb-bar/chipyard into openroad 2023-03-13 11:27:47 -07:00
nayiri-k
f2cf6b7e18 updating prerequisite setup for sky130 tutorials [skip ci] 2023-03-13 11:27:38 -07:00
Nayiri Krzysztofowicz
3b1530402f Merge branch 'vlsi-tutorial' of https://github.com/ucb-bar/chipyard into openroad 2023-03-12 12:29:07 -07:00
Nayiri Krzysztofowicz
1fd5381f89 Merge branch 'main' of https://github.com/ucb-bar/chipyard into vlsi-tutorial 2023-03-12 10:42:20 -07:00
joey0320
3b79de660f fix 2023-03-11 20:02:53 -08:00
joey0320
d7574084c1 Update docs related to circt 2023-03-11 18:56:36 -08:00
joey0320
1c1b0effa3 update docs for release 2023-03-11 16:52:50 -08:00
nayiri-k
e8c1b09d70 added note about generated-src being different for commercial/openroad flows 2023-03-10 22:37:31 -08:00
nayiri-k
d2130f2e31 updated layout of openroad design [skip ci] 2023-03-10 20:47:24 -08:00
nayiri-k
89a23faa00 updating docs to include correct build path [skip ci] 2023-03-10 15:12:43 -08:00
nayiri-k
15d001fe0c updated skywater tutorials 2023-03-09 11:35:41 -08:00
Ella Schwarz
c7ea3b6a47 Minor clarification in visualization section 2023-03-08 13:01:42 -08:00
Ella Schwarz
f1c24383b9 Add graphml visualization section 2023-03-08 10:14:57 -08:00
Jerry Zhao
4f74f29724 Merge pull request #1345 from ucb-bar/bringup2
Arty100T board + TSI-over-UART
2023-03-07 18:21:45 -08:00
Jerry Zhao
f8fb63687c Add arty100T and uart-tsi instructions 2023-03-06 17:48:26 -08:00
Abraham Gonzalez
f7a39f80e7 Config finder make target (#1328)
* Add config-finder make target

* Add recursive functionality

* Add config finder to CI

* Workaround bash argument limit failures
2023-03-06 14:00:20 -08:00
abejgonzalez
e744f7a20b Remove chisel-testers submodule 2023-03-03 16:50:05 -08:00
Harrison Liew
79a7275ad5 pattern match VLSI upgrade script 2023-03-01 14:02:35 -08:00
Jerry Zhao
be27029707 Merge pull request #1358 from ucb-bar/detcip
Remove TLHelper, directly use tilelink node constructors
2023-02-28 15:17:10 -08:00
Harrison Liew
a146bad526 fix typos 2023-02-24 15:59:33 -08:00
Harrison Liew
eb155a604f move hier docs 2023-02-24 15:05:35 -08:00