Add documentation page indicating existence of prefetchers

This commit is contained in:
Jerry Zhao
2023-06-08 14:24:34 -07:00
parent 7cbabaa18a
commit 903971f32f
4 changed files with 14 additions and 4 deletions

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Prefetchers
====================================
The BAR-fetchers library is a collection of Chisel-implemented prefetchers, designed for compatibility with Chipyard and Rocket-Chip SoCs.
This package implements a generic prefetcher API, and example implementations of NextLine, Strided, and AMPM prefetchers.
Prefetchers can be instantiated in front of a L1D HellaCache, or as TileLink nodes in front of some TileLink bus.
An example configuration using prefetchers is found in the ``PrefetchingRocketConfig``

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@@ -34,3 +34,4 @@ so changes to the generators themselves will automatically be used when building
NVDLA
Sodor
Mempress
Prefetchers