 abejgonzalez
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f4124e4cb6
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Add Lean Gemmini FireChip target
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2023-03-11 22:31:36 -08:00 |
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Jerry Zhao
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8d433f6536
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Bump gemmini/sha3 to fix baremetal test compile
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2023-03-11 10:33:53 -08:00 |
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abejgonzalez
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a62c1f5010
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Add a frag./config for MMIO only bridges
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2023-03-09 20:09:46 -08:00 |
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Sagar Karandikar
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88d7ababe8
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Merge remote-tracking branch 'origin/main' into xcelium-support
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2023-03-09 01:49:45 +00:00 |
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Sagar Karandikar
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7c2ec8fb4c
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more fixes
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2023-03-09 01:48:25 +00:00 |
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Sagar Karandikar
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8947216707
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first pass at xcelium support
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2023-03-08 17:57:31 +00:00 |
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Jerry ZhaoandGitHub
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4f74f29724
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Merge pull request #1345 from ucb-bar/bringup2
Arty100T board + TSI-over-UART
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2023-03-07 18:21:45 -08:00 |
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abejgonzalez
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1357ea4f12
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Update assert message
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2023-03-01 13:39:00 -08:00 |
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Jerry Zhao
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66e4448008
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Merge remote-tracking branch 'origin/main' into bringup2
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2023-02-28 16:19:14 -08:00 |
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Jerry Zhao
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2a4c5e6f88
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Bump testchipip
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2023-02-28 16:16:04 -08:00 |
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Jerry ZhaoandGitHub
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be27029707
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Merge pull request #1358 from ucb-bar/detcip
Remove TLHelper, directly use tilelink node constructors
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2023-02-28 15:17:10 -08:00 |
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Jerry ZhaoandGitHub
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4cdc2801be
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Override spike's misa in cosim mode
Writable bits in MISA is implementation-defined, so we can't follow spike here.
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2023-02-22 15:15:28 -08:00 |
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Jerry Zhao
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f8fb8f38d8
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Bump testchipip
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2023-02-22 14:49:43 -08:00 |
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Jerry Zhao
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27b0dd8abe
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Remove TLHelper, directly use tilelink node constructors
TLHelper 1) obfuscates the underlying node architecture and
2) results in otherwise unnecessary dependencies on testchipip
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2023-02-22 11:35:38 -08:00 |
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Jerry Zhao
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154c31677c
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Consolidate mmio-accelerator test configs into a single config
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2023-02-22 00:21:44 -08:00 |
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Jerry Zhao
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a4827b0749
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Consolidate peripheral device testing configs into a single ManyPeripheralsConfig
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2023-02-22 00:21:44 -08:00 |
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Jerry Zhao
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dd52a3ba8f
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Bump boom
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2023-02-22 00:21:44 -08:00 |
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Abraham GonzalezandGitHub
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632a7a9348
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Merge pull request #1349 from ucb-bar/misc-improv
Small build system improvements
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2023-02-16 11:40:55 -08:00 |
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Jerry Zhao
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a50e7d3117
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Add more arty100t configs with configurable TSI-UART baudrate
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2023-02-15 21:45:09 -08:00 |
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abejgonzalez
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aa02295a0b
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Fix spacing of AbstactConfig
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2023-02-15 19:24:43 -08:00 |
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Jerry ZhaoandGitHub
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089dbc1fb6
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Merge pull request #1323 from ucb-bar/spikecosim
Add support for cosimulation with Spike
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2023-02-15 15:29:47 -08:00 |
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abejgonzalez
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85fe061244
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Use EICG_wrapper model as addResource/Path | Fix Makefile parsing
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2023-02-15 14:19:55 -08:00 |
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Jerry Zhao
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971bd9bec7
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Bump testchipip
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2023-02-15 14:03:41 -08:00 |
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Jerry Zhao
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89090f6b90
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Remove need for separate SpikeCosimResources
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2023-02-15 10:17:08 -08:00 |
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Jerry Zhao
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61cc18749a
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Fix more bugs with arty100t
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2023-02-14 17:15:44 -08:00 |
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Jerry Zhao
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85fa9d1120
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Add ARTY100t bringup + TSI-over-UART
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2023-02-14 15:01:52 -08:00 |
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Jerry ZhaoandGitHub
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3dc4fff29b
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Merge pull request #1339 from ucb-bar/bump-constellation
Bump constellation for some bug fixes
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2023-02-14 13:55:53 -08:00 |
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Jerry ZhaoandGitHub
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efe5122cc3
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Merge pull request #1340 from ucb-bar/accelcfg
Split up RocketConfigs.scala
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2023-02-14 10:01:28 -08:00 |
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Jerry Zhao
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2096ffa7af
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Bump rocket-chip
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2023-02-14 00:35:30 -08:00 |
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Jerry Zhao
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74f4c8c1d7
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Add a NoCore config - useful for testing
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2023-02-13 18:46:20 -08:00 |
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Jerry Zhao
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9e7cdb6ccd
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Remove Ringbus config from firechip
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2023-02-11 15:48:16 -08:00 |
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Jerry Zhao
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1ee45b55da
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Add new PeripheralDeviceConfigs
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2023-02-11 12:58:43 -08:00 |
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Jerry Zhao
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4751d72d2f
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Remove old RingSystemBusConfig
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2023-02-11 12:55:11 -08:00 |
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Jerry Zhao
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7a8bbd0747
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split RocketConfigs into RoCCAccelConfigs and MMIOAccelConfigs
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2023-02-11 12:44:42 -08:00 |
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Jerry Zhao
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6e5ac8c467
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Bump constellation for some bug fixes
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2023-02-11 12:32:17 -08:00 |
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Jerry Zhao
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1766501795
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Fix Spike DPI decoupled interface
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2023-02-11 12:29:45 -08:00 |
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Jerry Zhao
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670569f611
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Merge remote-tracking branch 'origin/main' into spikecosim
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2023-02-11 12:21:58 -08:00 |
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Jerry ZhaoandGitHub
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f2dfd295e2
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Merge pull request #1338 from ucb-bar/sodor
Bump sodor for SLLI/SRLI/SRAI fix
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2023-02-11 00:22:47 -08:00 |
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Albert Ou
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445895eb84
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Bump sodor for SLLI/SRLI/SRAI fix
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2023-02-10 16:11:04 -08:00 |
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Jerry Zhao
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06b16e865e
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Move boom's tracegen interface to boom submodule - this improves maintainability
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2023-02-08 09:35:13 -08:00 |
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Jerry Zhao
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d5bf00aab1
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Bump spike-cosim for spike changes
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2023-02-07 14:04:55 -08:00 |
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Jerry Zhao
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e1eed42ed8
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Merge remote-tracking branch 'origin/main' into spikecosim
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2023-02-07 11:55:23 -08:00 |
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Jerry Zhao
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48905323d1
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Fix spiketile not compiling:
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2023-02-05 23:11:16 -08:00 |
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Jerry Zhao
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16353f9091
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Merge remote-tracking branch 'origin/main' into de-esp-tools
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2023-02-05 22:44:05 -08:00 |
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Jerry Zhao
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2a2de5850f
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Implement cosim purely in a HarnessBindeR
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2023-02-05 20:59:14 -08:00 |
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Jerry ZhaoandGitHub
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a6921d15c6
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Merge pull request #1325 from ucb-bar/ring_example
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2023-02-05 16:42:41 -08:00 |
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Jerry Zhao
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e5a734e20a
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Bump gemmini
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2023-02-05 09:59:58 -08:00 |
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Jerry Zhao
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fc611ef507
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Fix CSR overrides in spike cosim
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2023-02-04 16:55:43 -08:00 |
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Jerry Zhao
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e27f1a3195
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Make SpikeTile ipc a plusarg
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2023-02-04 16:17:02 -08:00 |
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Jerry Zhao
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3c256d1f3d
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Bump gemmini
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2023-02-04 15:24:11 -08:00 |
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