wu-arch/chipyard
1
0
Fork 0
Code Issues Pull Requests Actions 40 Packages Projects Releases Wiki Activity
5,033 Commits 8 Branches 0 Tags
87783dc9f637e21633ddc261b8a451a40dbac09e
Commit Graph
402 Commits
Author SHA1 Message Date
hexu 5ce98e1491 Update WU architecture integration 2026-05-25 19:26:23 +08:00
hexu ec349a854f Add Blackwell tensor core support to Chipyard
update-circt / update-circt (push) Has been cancelled
Details 
- Update RadianceConfigs.scala with Blackwell configurations
- Update Verilator Makefile with optimized build flags
- Update submodules: radiance (Blackwell implementation), gemmini (params update)
- Update build flags and gitignore
 2026-05-06 14:52:08 +08:00
Hansung Kim aeb4517074 Fix smem script filename 2025-01-31 01:54:51 -08:00
Hansung Kim c1f922706e Add flash utilization 2025-01-31 00:49:51 -08:00
Richard Yan 8c228a6a89 sanity script, bump radiance 2025-01-31 00:01:18 -08:00
Hansung Kim 4187738b51 Add missing flash compile and run script 2025-01-30 23:26:23 -08:00
Richard Yan 8e841f3326 update env script 2025-01-30 21:28:24 -08:00
Richard Yan 922c44bfac utilization calculation 2025-01-30 19:29:20 -08:00
Richard Yan ce3fa99465 update scripts 2025-01-30 18:03:21 -08:00
Richard Yan 7a88736430 timeout cycles set to 0 2025-01-30 03:34:39 -08:00
Richard Yan fa076cf517 update smem script, enable 1024 sim 2025-01-30 03:31:20 -08:00
Richard Yan 078a38a906 scripts to compile and run experiments 2025-01-30 02:54:57 -08:00
Richard Yan 4b729b776d bump radiance and cleanup configs; add print util script 2024-09-26 18:01:07 -07:00
Hansung Kim 3c1ea26625 vcs.mk: Squelch unnamed assertion lint message 2024-08-07 11:18:27 -07:00
Richard Yan ef9c9a1ae0 redirect firesim to fork and bump firesim 2024-06-11 01:40:42 -07:00
Richard Yan c824ea0df8 Merge branch 'graphics' of https://github.com/hansungk/chipyard into graphics 2024-06-09 15:29:26 -07:00
Richard Yan 746811808d bunch of stuff dont remember 2024-06-09 15:29:22 -07:00
Hansung Kim 1e5b468e79 vcs.mk: Ignore null statement lint 2024-05-16 15:50:29 -07:00
Richard Yan a18c5de271 Merge branch 'main' of https://github.com/ucb-bar/chipyard into ucb-bar-main 2024-05-15 23:22:20 -07:00
Richard Yan eab9eabf98 support for .out printf 2024-05-15 21:52:04 -07:00
Jerry Zhao 39092e9b00 Switch RTL-sim/FPGA/VLSI flows to chisel6 2024-05-13 12:48:06 -07:00
Jerry Zhao 838cd9a69f Remove hwacha/esp-tools 2024-05-10 17:27:10 -07:00
Richard Yan b1beb324f1 Merge branch 'graphics' of https://github.com/hansungk/chipyard into graphics 2024-05-08 15:06:01 -07:00
Richard Yan d86f13dbfa support dedicated printf buffer output 2024-05-08 15:03:21 -07:00
Hansung Kim 3dc58def3c Add parallel flag to VCS/Verilator C compilation 2024-05-07 16:18:30 -07:00
Jerry Zhao f2a2654fc8 Bump firesim to version with detached build.sbt 2024-04-25 12:16:43 -07:00
Richard Yan d0b274ab78 Merge branch 'main' of https://github.com/ucb-bar/chipyard into ucb-bar-main 2024-04-20 02:03:35 -07:00
Richard Yan e75c77a08a synthesizable radiance 2024-04-17 18:22:44 -07:00
Hansung Kim f77f1edecc Add fpnew packages and include dirs to vcs flags 
This is necessary because Verilog package definitions need to be compiled before
the modules that reference them, but the compilation order is not enforced with
addResource()s.
 2024-04-15 15:31:10 -07:00
Richard Yan 13766128bf add printf script, bump gemmini and radiance 2024-04-15 10:01:47 -07:00
Jerry Zhao 4ce6198b86 Pass -top flag to VCS to avoid simulating non-tops 2024-03-19 23:49:08 -07:00
Jerry Zhao 7b3d3e54bd Add incdirs to vcs/verilator flows 2024-03-19 23:48:51 -07:00
Vighnesh Iyer 390980e51a bump firesim 2024-03-13 14:27:15 -07:00
Jerry Zhao a27bc7f5ed Bump rocket-chip to standalone diplomacy 2024-03-10 12:16:12 -07:00
Jerry Zhao 931da1d276 Bump firesim 2024-03-08 12:58:21 -08:00
Jerry Zhao bf4d83bc39 Bump firesim 2024-02-25 16:49:30 -08:00
Hansung Kim 446e8fe245 Move vortex-specific EXTRA_SIM_PREPROC_DEFINES to mk fragment 2024-02-05 09:42:10 -08:00
Richard Yan fd5fa7b6e1 Merge branch 'main' of https://github.com/ucb-bar/chipyard into graphics 2024-02-02 16:28:55 -08:00
joonho.whangbo 71da0c36f7 Bump fsim 2024-01-22 18:03:03 -08:00
joey0320andJerry Zhao 778e133842 Bump fsim 2024-01-20 16:50:06 -08:00
Hansung Kim 0e078b2701 Remove unnecessary make clean in run-radiance.sh 2024-01-17 11:36:40 -08:00
Hansung Kim bf84580010 Merge remote-tracking branch 'upstream/main' into graphics 2024-01-16 22:39:37 -08:00
Hansung Kim 3190224cfe Squelch inout coerce lint messages from vortex RTL 2024-01-16 16:32:30 -08:00
Hansung Kim 0bb2a5c6f2 Accept EXTRA_SIM_PREPROC_DEFINES in run-radiance.sh 2024-01-16 16:31:26 -08:00
Jerry Zhao 45d74f6db2 Merge remote-tracking branch 'origin/main' into symmetric_sertl 2024-01-11 11:43:24 -08:00
Jerry Zhao d51a9a74d3 Merge remote-tracking branch 'origin/main' into clusters 2024-01-09 13:30:26 -08:00
Jerry Zhao 7c13574769 Rename cache/blocks submodules to match new chipsalliance ownership 2024-01-05 10:42:00 -08:00
Jerry Zhao 41651edbdc Bump firesim | fix testchipip segfaults 2024-01-01 18:40:59 -08:00
Hansung Kim fdf02063a3 Add scripts for vortex binfile setup and sim runs 2023-12-30 16:36:34 -08:00
Hansung Kim ba6c80768e gitignore Vortex *.bin files in sims/ 2023-12-30 16:36:03 -08:00