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66 Commits

Author SHA1 Message Date
Jerry Zhao
7b3d3e54bd Add incdirs to vcs/verilator flows 2024-03-19 23:48:51 -07:00
Jerry Zhao
8600640a40 Bump verilator to v5.018 2023-12-29 19:17:01 -08:00
Jerry Zhao
56e5421b8e Fix verilator random seed flag 2023-06-05 09:58:29 -07:00
Abraham Gonzalez
c1ad70c10f Merge pull request #1375 from ucb-bar/use-fat-jar 
Use fat jar's to remove SBT invocations
 2023-05-26 17:03:42 -07:00
abejgonzalez
b65d8ef6c6 Have global location to store jar files (avoid issue with sbt assembly caching) 2023-05-26 13:14:06 -07:00
Jerry Zhao
4da1dea50f Support multi-binary-run in RTL sim 2023-05-24 16:48:18 -07:00
Jerry Zhao
ab6479641e Fix verilator vcd/fsdt file extension 2023-05-10 15:16:16 -07:00
abejgonzalez
95349755b5 Support TestDriver.v as top 2023-03-13 11:11:23 -07:00
abejgonzalez
4c0314a46a Bump verilator 2023-03-12 11:19:37 -07:00
joey0320
a9209c4aaa Fix TestDriver.v missing from gen-collateral after recompiling 2023-02-21 21:52:03 -08:00
abejgonzalez
55950b61b9 Move sim_files creation after FIRTOOL | Have FIRTOOL delete collateral dir 2023-02-15 12:01:58 -08:00
joey0320
58a6e72528 rename OUT_DIR to GEN_COLLATERAL_DIR 2023-02-13 13:24:04 -08:00
joey0320
6cd46d3c73 fixes 2023-02-13 02:14:23 -08:00
abejgonzalez
bd0b3e8f1d Update paths | Allow sed overrides 2023-01-09 10:33:41 -08:00
abejgonzalez
9f2fd22cc0 Rename variables | Small fixes | Move out-srcs to new dir 2023-01-09 10:32:44 -08:00
abejgonzalez
c179f53ed0 Fix comments 2023-01-09 10:25:29 -08:00
abejgonzalez
a384fa9d1d E2E RocketConfig compile in Verilator 2023-01-09 10:25:27 -08:00
abejgonzalez
16cdc88c52 Small comment + org. fix | Remove extra mkdirs 2021-05-12 16:42:05 -07:00
abejgonzalez
383d11c2ad Forgot to add testchip_tsi.* to verilator 2021-05-06 22:32:40 -07:00
abejgonzalez
a0de9a0cfb Depend on build_dir 2021-05-06 20:36:28 -07:00
abejgonzalez
eb85415783 Have Verilator build with unused simulation files 2021-05-06 15:09:40 -07:00
abejgonzalez
95f55a667f Elaborate comments a bit more | Remove BB'ed files that are auto-copied/added 2021-05-06 14:45:45 -07:00
abejgonzalez
1d52899736 Remove GenerateSimFiles and use make instead 2021-05-06 00:27:11 -07:00
Jerry Zhao
71a3ea8abc Allow custom verilator optimization flags 2020-11-24 16:55:08 -08:00
abejgonzalez
a2ebbee2ac Rename Ariane to CVA6 2020-11-04 15:42:30 -08:00
abejgonzalez
06747e6cff Dedup simulation flags 2020-08-21 17:27:50 -07:00
abejgonzalez
2168813da0 Add help string | Fix emulator CC to not conflict with --vpi 2020-08-21 14:07:32 -07:00
abejgonzalez
446631543b Use TRACING_OPTS in debug Verilator 2020-08-21 11:20:45 -07:00
abejgonzalez
425b8ce850 Add support for multi-threaded verilator 2020-08-20 23:37:17 -07:00
abejgonzalez
fdda4cf8f5 Update the cfuncs split 2020-08-20 16:21:39 -07:00
abejgonzalez
435bfac45e Fix NVDLA/Ariane builds 2020-08-20 16:10:14 -07:00
abejgonzalez
9d3c14034d Revert Verilator external IP flags 2020-08-20 10:40:21 -07:00
abejgonzalez
e5158cbe4c Rename some variables 2020-08-19 22:32:47 -07:00
Abraham Gonzalez
b7d9472b4a Cleanup help commands 2020-08-19 22:10:18 -07:00
abejgonzalez
de4e311dd3 Remove extra CMODE flags 2020-08-19 11:21:35 -07:00
Abraham Gonzalez
3b991f3ed7 Move vcs flags to vcs.mk | Misc. cleanup 2020-08-18 11:14:01 -07:00
Abraham Gonzalez
4e7b9d195f Dedup default simulation rules 2020-08-18 10:45:11 -07:00
Abraham Gonzalez
b007d79820 Add help section to makefiles + Reorganize 2020-08-17 20:28:05 -07:00
Jerry Zhao
b719919934 Add RANDOM_SEED variable to set random init for VCS and Verilator simulations 2020-07-20 18:25:18 -07:00
Jerry Zhao
71f340a0af Use output_dir for run-binary logs and waveforms (#596) 
* Dump run-binary files in output/$(long_name) instead of current directory
* Remove run-none rules, these were equivalent to run-binary BINARY=none
 2020-06-12 10:08:55 -07:00
Colin Schmidt
171b805d0e Allow dramsim_ini folder to be set at the command line 2020-06-05 16:55:13 -07:00
Colin Schmidt
a7119fb5ed Hoist permissive settings out of inner makefiles 2020-05-24 10:31:24 -07:00
Colin Schmidt
29664cdf6a Upgrade verilator to support permissive args in the same way as vcs 
It previously only supported them as the last argument.
Supporting them in this case would have removed some of
the DRY code that is able to handle both simulators.
 2020-05-24 09:29:22 -07:00
Abraham Gonzalez
85b555dbce NVDLA Integration + Cleanup Ariane Preprocessing (#505) 
* [nvdla] initial nvdla integration

* [nvdla] add firesim configs

* [nvdla] re-add accidentally deleted line

* [nvdla] works on master with small

* [nvdla] use master branch of nvdla

* [nvdla] remove extra sources

* [nvdla] bump

* [nvdla + ariane] bump and use insert-includes for pre-processing

* [nvdla] add ci | remove target configs in FireChip | update naming

* [nvdla] bump nvdla | fix ci run-tests error

* [nvdla] re-enable PCWM-L error | fix/update makefile(s)

* [nvdla] bump nvdla fragments in FireChip

* [misc] bump tutorial patches

* [chipyard] remove extra import

* [nvdla] bump nvdla for pbus [ci skip]

* [nvdla] update firemarshal and add nvdla workload

* [nvdla] bump nvdla-workload

* [nvdla] bump hw

* [docs] add basic documentation

* [docs] adjustments to documentation

* [misc] update docs | bump firesim with recipe

* [misc] disable error on warnings in verilator | bump number width to match RC

* [docs] fix doc build error

* [verilator] move no fail on warning to be global

* [ci skip] [nvdla] bump submodule urls

* [misc] move firesim specific configs into nvdla dir [ci skip]

* [nvdla] fix run-tests in ci

* update RC configs | bump marshal | bump nvdla-workload

* [nvdla] bump nvdla-workload [ci skip]

* add topology mixin to nvdla configs

* update tutorial patches
 2020-05-16 12:22:30 -07:00
Albert Magyar
2a6bd3bd5c Bump verilator to v4.034 (#547) 
* Bump verilator to v4.034
* Add new flags to verilator makefile
* Conditionally set timescale flag based on Verilator version
 2020-05-11 23:02:37 -07:00
Howard Mao
a905dbedcc add make rules for running simulator without executable 2020-04-28 10:32:28 -07:00
Tynan McAuley
24b63c9577 Fix bug in verilator Makefile for 'debug' rule (#513) 
The 'debug' rule is currently cleaning out the non-debug-model directory
rather than the debug-model directory. This commit fixes that, and
changes both the debug and non-debug rules to use the variables defined
for referring to these two model directories.

Co-authored-by: Tynan McAuley <tynan@galois.com>
 2020-04-15 20:35:56 -07:00
Abraham Gonzalez
3d253c0f67 [make] split up specific make vars/targets into frags (#499) 
* [make] split up specific make vars/targets into frags

* [make] move dramsim and max-cycles into SIM_FLAGS

* [misc] move ariane configs to configs/ folder
 2020-03-30 17:04:45 -07:00
Abraham Gonzalez
d0bec3fba7 Ariane Integration (#448) 
* [ariane/make] integrate ariane | have verilator be installed on path not in makefile

* [misc] warn on verilator not found | search for v files | cleanup build.sbt + .gitignore

* [firesim] bump

* [ci] add midas ariane tests

* [docker/ci] use new docker-image with verilator | re-elab on v changes for ariane | address comments

* [ci] remove references to local verilator install

* [verilator] update flags

* [verilator] minimal set of flags for ariane

* [ariane] bump ariane to master

* [ci] revert to 4.016 verilator

* [ci] install verilator to ci server | misc compile fixes

* [ci/make] add longer ci timeout | update when assert is added in verilator sim

* [firesim] bump for misc. updates

* [make/ci] cleanup makefile and remove firesim tests of it

* [docs/firesim] bump and clean docs

* [firesim] bump

* [ci] use remote verilator for midas tests

* [misc] cleanup built.sbt more

* [firesim] bump

* [misc] bump build.sbt patch for tutorials

* [firesim/ci] cleanup and bump firesim
 2020-03-09 18:06:41 -07:00
Howard Mao
24fe57d447 use blackboxed SimDRAM instead of SimAXIMem 2020-03-02 20:49:20 -08:00