Commit Graph

4589 Commits

Author SHA1 Message Date
Howard Mao
752a28893d test multi-channel memory 2017-07-18 20:25:32 -07:00
Colin Schmidt
8e910df8ba Merge pull request #12 from ucb-bar/fix-firrtl-error
Build firrtl first so we dont get that weird error
2017-07-17 12:34:47 -07:00
Colin Schmidt
098b031dc6 remove old readme about publish local 2017-07-13 17:07:28 -07:00
Colin Schmidt
24cb846812 Build firrtl first so we dont get that weird error 2017-07-13 16:58:52 -07:00
Howard Mao
984827db2e update rocketchip 2017-07-12 10:44:27 -07:00
Jack Koenig
e2002cb62a Add syntax highlighting to README.md 2017-07-07 17:26:17 -07:00
Howard Mao
67e7652ae7 add section on network device to README 2017-07-08 00:21:27 +00:00
Howard Mao
6d77cd2ff7 bump testchipip 2017-07-07 18:39:56 +00:00
Howard Mao
abef4737fa connect SimNetwork to actual network 2017-07-04 03:54:32 +00:00
Howard Mao
cb6290539c add network simulation C++ code 2017-07-01 19:58:31 -07:00
Howard Mao
b662854750 changes to SimpleNIC interface 2017-06-27 18:06:02 -07:00
Howard Mao
b8456d2b4b changes to NIC interface 2017-06-27 10:03:57 -07:00
Howard Mao
b9ffcadc20 add 8-bit and 16-bit MMIO read/write functions 2017-06-27 10:03:42 -07:00
Howard Mao
6e3a173c93 add SimpleNic 2017-06-26 20:27:47 -07:00
Howard Mao
8d029185ca separate mmio read/write functions by size 2017-06-26 20:25:37 -07:00
Howard Mao
f766dcc550 merge the different ExampleTop subclasses into the example package 2017-06-26 16:29:04 -07:00
Howard Mao
31f5fc98e4 fix multi-tracker block device 2017-06-23 22:50:54 -07:00
Howard Mao
2b773a2e51 BlockDevice can now specify max request length 2017-06-23 17:17:21 -07:00
Howard Mao
8505078c41 fixup licensing and attribution 2017-06-23 13:12:57 -07:00
Howard Mao
119e563ea6 fix verilator build 2017-06-22 17:41:48 -07:00
Howard Mao
9a9ebea207 add new (Tilelink2) RoCC accelerator interface
Includes configuration, test programs, and documentation updates.
2017-06-22 16:43:14 -07:00
Howard Mao
634cad9e78 update README 2017-06-22 11:58:19 -07:00
Howard Mao
a1d866c344 fix chisel3 deprecations 2017-06-22 10:04:47 -07:00
Howard Mao
bac811a173 add ExampleTopWithBlockDevice and tests 2017-06-21 11:09:55 -07:00
Howard Mao
1f3e892b64 update to latest rocket-chip 2017-06-21 11:05:40 -07:00
Howard Mao
0d821efb5f use RegisterRouter to simplify PWM 2017-06-12 10:55:03 -07:00
Howard Mao
3e2b6a1d55 make clean should clean everything
Also add "make clean" for verisim"
2017-06-07 17:14:46 -07:00
Howard Mao
ab87f7d487 make sure first-stage bootloader loads a0 and a1 as expected by pk 2017-06-07 17:13:05 -07:00
Howard Mao
e0590df7a2 update rocket-chip and testchipip 2017-06-05 15:07:33 -07:00
Howard Mao
44aa4e25a9 move generic mmio functions to header file 2017-05-29 14:33:43 -07:00
Howard Mao
062d443863 upgrade to latest rocket-chip 2017-05-25 12:55:52 -07:00
Howard Mao
a123d82677 bump submodules 2017-05-09 16:25:44 -07:00
Howard Mao
363f530b05 make sure pwm test returns success 2017-05-08 10:04:55 -07:00
Howard Mao
27bd063441 update to tilelink2 2017-04-20 18:12:44 -07:00
Colin Schmidt
2fecb10cfc Merge pull request #4 from ucb-bar/publish-local
Publish firrtl locally first, to make Chisel happy
2017-04-06 10:09:13 -07:00
Chick Markley
16846b86fd DiGraph was being being confused with the DigGraph in firrtl. This led to pathological exceptions (#22)
No such method error on accessing a lazy val.
InstanceGraph seemed also to be a duplicate of firrtl code
---
IOPadSpec fails no two tests but these seem to be at least an ordinary error. And should be debugged separately
2017-04-04 10:47:59 -07:00
Angie Wang
5b5c8c82db Revert "[stevo]: add custom analog annotation" (#21)
* Revert "[stevo]: add custom analog annotation (#20)"

This reverts commit 7ad088503f.
2017-04-02 13:12:51 -07:00
Angie
9305dd08eb remove functionality from clkgen pass due to compatibility issue with latest firrtl 2017-04-02 04:34:38 -07:00
Angie
7c0e6c89d2 firrtl still hasn't fixed the problem with wir primops 2017-04-02 04:26:27 -07:00
Angie Wang
7ad088503f [stevo]: add custom analog annotation (#20) 2017-04-02 04:12:31 -07:00
Angie Wang
a13869b6aa Refactor repo for lastest changes to firrtl transform api changes (#19) 2017-04-02 04:10:46 -07:00
Angie Wang
5574354f55 Fft changes (#17)
* modified CustomBundle to also apply on Int

* programmatic bundle should take T <: Data instead of Data

* turns out indexedElements doesn't synthesize

* had to change a bunch of files to get clk/pads compiling again with recent firrtl mods

* modified CustomBundle to also apply on Int

* programmatic bundle should take T <: Data instead of Data

* turns out indexedElements doesn't synthesize

* had to change a bunch of files to get clk/pads compiling again with recent firrtl mods

* clk phases should be less than divby amount

* make clkconstraint error more descriptive

* don't make custom*bundle final

* nevermind. bundles need to be final.

* turns out making the bundle non-final was ok...

* removed infertypes from clksrctransform. seems like it doesn't work @ low firrtl?
2017-04-02 03:49:49 -07:00
Ben Keller
25bf3f7e01 Update README with workaround for dependency issues 2017-03-24 10:16:39 -07:00
Ben Keller
27095a4450 Revert "Publish firrtl locally first, to make Chisel happy"
This reverts commit 5491173a0a.
2017-03-24 10:06:01 -07:00
Ben Keller
5491173a0a Publish firrtl locally first, to make Chisel happy 2017-03-23 17:27:49 -07:00
Stevo
f4a8715fa4 Combine generates, make it a trait (#11)
* [stevo]: combine generates, make it a trait

* [stevo]: add Generator ala rocket-chip, some other cleanup

* [stevo]: remove Generator, since that generates firrtl...

* [stevo]: still debugging

* [stevo]: okay i think it works now

* [stevo]: oops

* Refactor new generate code. Mostly just style stuff.
2017-03-22 14:37:26 -07:00
chick
2d7806ca79 I would like to take the scalatest version here back to 2.2.5 because it causes problems with IntelliJ right now.
I don't see any specific features of 3.0.0 that are being used here.
2017-03-16 11:48:53 -07:00
Adam Izraelevitz
35b325dc81 Update README.md with example invocation (#16) 2017-03-15 12:16:22 -07:00
Edward Wang
d039935642 Typo 2017-03-15 00:28:30 -07:00
Angie Wang
f7056f3529 Fft changes (#15)
* modified CustomBundle to also apply on Int

* programmatic bundle should take T <: Data instead of Data

* turns out indexedElements doesn't synthesize

* had to change a bunch of files to get clk/pads compiling again with recent firrtl mods
2017-03-14 23:59:57 -07:00