alonamid
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4853300de6
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Merge pull request #247 from ucb-bar/firrtl-docs
Firrtl Transforms Documentation
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2019-09-27 00:45:44 -07:00 |
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abejgonzalez
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f24eba30f6
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change order of dontTouch | make more concise [ci skip]
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2019-09-27 00:32:47 -07:00 |
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abejgonzalez
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802c11dbef
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add some extra clarity [ci skip]
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2019-09-26 23:16:57 -07:00 |
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abejgonzalez
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c6bdeda9ed
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small fixes + cleaner example explanation [ci skip]
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2019-09-26 23:10:51 -07:00 |
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Albert Magyar
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f2939823ce
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Clean up paragraph on FIRRTL transform BlackBox support
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2019-09-26 10:09:02 -07:00 |
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Albert Magyar
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28664ea8df
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Update section header on Verilog support in chipyard tools
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2019-09-26 09:50:41 -07:00 |
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Albert Magyar
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216ae3ee54
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Add more tips for Verilog blackbox integration
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2019-09-26 09:32:38 -07:00 |
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Albert Magyar
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c2ce173195
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Add Verilog MMIO GCD peripheral example
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2019-09-26 01:47:31 -07:00 |
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abejgonzalez
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71db99911b
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extra cleanup [ci skip]
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2019-09-25 17:54:47 -07:00 |
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abejgonzalez
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e90d53e31e
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add tranforms to index [ci skip]
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2019-09-25 13:21:11 -07:00 |
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abejgonzalez
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9199a02e1e
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add literal references | cleanup firrtl-transform-docs [ci skip]
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2019-09-25 13:21:01 -07:00 |
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alonamid
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eae7645159
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sifive generators
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2019-09-25 11:56:26 -07:00 |
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abejgonzalez
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4c443d2077
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start firrtl transform docs [skip ci]
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2019-09-25 10:26:40 -07:00 |
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abejgonzalez
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fd6d3272e4
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add quotes around core/tile [skip ci]
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2019-09-20 18:00:11 -07:00 |
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abejgonzalez
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898f0fd2d4
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cleanup grammar a bit [skip ci]
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2019-09-20 17:51:46 -07:00 |
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abejgonzalez
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ff992ef24e
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add hart of 2 to heter explanation | footnote about tile v core [skip ci]
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2019-09-20 17:36:53 -07:00 |
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abejgonzalez
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edaf99ca9a
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small clarifications + cleanup [skip ci]
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2019-09-20 12:25:23 -07:00 |
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Howard Mao
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d5bccc0455
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add additional example code as literalincludes
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2019-09-12 18:08:45 -07:00 |
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Howard Mao
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6ae60b94c6
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correct capitalization in Adding an Accelerator/Device
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2019-09-12 17:56:12 -07:00 |
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Howard Mao
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9a8d6c908f
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fix verilator invocation in Adding an Accelerator
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2019-09-12 17:54:08 -07:00 |
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Howard Mao
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bc903b8407
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more on customization of L1
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2019-09-12 14:34:57 -07:00 |
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Howard Mao
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c6f6b2e117
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mention address of BootROM and first instruction
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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200fec07e6
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make purpose of CachelessRocketConfig clearer
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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9bb4215c7d
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add changes Alon requested
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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646d7cba4c
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use literalinclude directive to pull source directly from example package
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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a4371fa917
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add section on SoC boot process
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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c0f49a47d8
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more fixes to Adding an Accelerator
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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d411dd9a6c
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fill out Memory Hierarchy section
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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b748dcf14e
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update 'Adding an Accelerator' for API changes
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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ab888d32a7
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Merge pull request #215 from ucb-bar/dev-tracegen
Add TraceGen project
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2019-08-31 05:21:51 +08:00 |
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Howard Mao
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c33c6a2985
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get rid of now-defunct documention
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2019-08-30 11:38:08 -07:00 |
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Jerry Zhao
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4de40d3863
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Update naming in docs
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2019-08-28 14:53:24 -07:00 |
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abejgonzalez
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8ba73d13b8
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fix the doc warnings
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2019-08-08 17:19:10 -07:00 |
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abejgonzalez
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2e043bd06f
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Merge remote-tracking branch 'origin/dev' into abe-docs-dev
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2019-08-07 23:39:11 -07:00 |
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alonamid
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aec0fb73c4
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docs reorg
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2019-07-25 01:20:38 -07:00 |
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