abejgonzalez
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b3eeb70045
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clarifications
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2019-06-24 09:37:05 -07:00 |
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abejgonzalez
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c61713d807
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removed extra core in names | misc cleanup
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2019-06-24 09:37:05 -07:00 |
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abejgonzalez
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5f19697618
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first attempt at explaining heter systems
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2019-06-24 09:37:05 -07:00 |
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Abraham Gonzalez
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3377bb09c7
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Merge pull request #124 from ucb-bar/rebar-dev-verilator-bump
bump verilator version
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2019-06-24 09:03:23 -07:00 |
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Abraham Gonzalez
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73d69eb0b4
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Merge pull request #125 from ucb-bar/chipyard-rename
Rename to chipyard
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2019-06-24 09:01:18 -07:00 |
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abejgonzalez
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b556bee0b9
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rename to "Chipyard"
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2019-06-23 22:47:23 -07:00 |
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abejgonzalez
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4cca0ed57e
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bump verilator version
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2019-06-19 09:35:46 -07:00 |
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Abraham Gonzalez
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9a22afb58f
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Merge pull request #120 from ucb-bar/rebar-dev-hart0-tests
use hart0 for the test suite
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2019-06-13 10:29:25 -07:00 |
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Abraham Gonzalez
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a966876727
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Merge pull request #119 from ucb-bar/bump-boom
Bump BOOM
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2019-06-12 16:37:28 -07:00 |
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abejgonzalez
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4a667c3df9
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correct naming in defaults
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2019-06-12 14:54:49 -07:00 |
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abejgonzalez
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ba6352afca
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update boom hash
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2019-06-12 14:25:32 -07:00 |
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abejgonzalez
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a906f05962
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use hart0 for the test suite
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2019-06-11 17:55:32 -07:00 |
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abejgonzalez
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af8f0b0507
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update naming in accordance with boom
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2019-06-10 13:56:38 -07:00 |
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Abraham Gonzalez
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0994299cac
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Merge pull request #115 from ucb-bar/rebar-dev-rmv-sim-flags
Remove CHISEL_ARGS
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2019-06-03 20:09:05 -07:00 |
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abejgonzalez
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51960f4345
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remove deprecated CHISEL_ARGS
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2019-06-03 19:11:45 -07:00 |
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Abraham Gonzalez
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e44b78a0c1
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Merge pull request #114 from ucb-bar/rebar-dev-commit-master
Check if submodule commits are on master
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2019-06-03 17:25:27 -07:00 |
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abejgonzalez
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bbaa8d58b0
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switch to git branch
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2019-06-03 09:41:56 -07:00 |
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abejgonzalez
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eb93ace725
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check if commit is on master
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2019-06-02 23:25:51 -07:00 |
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Abraham Gonzalez
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c037a6fe8b
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Merge pull request #112 from ucb-bar/boom-bump
Bump boom
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2019-06-01 16:30:45 -07:00 |
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Jerry Zhao
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19e092b26a
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Bump boom
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2019-06-01 15:14:25 -07:00 |
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Abraham Gonzalez
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8a611bde0b
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Merge pull request #102 from ucb-bar/rebar-dev-setup-fix
make sure code blocks appear
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2019-05-28 23:05:45 -07:00 |
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abejgonzalez
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3a1dbf8983
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make sure code blocks appear
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2019-05-28 23:04:53 -07:00 |
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Abraham Gonzalez
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57a471e21e
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Merge pull request #100 from ucb-bar/rebar-dev-setup-repo
add initial setup instructions
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2019-05-28 22:55:58 -07:00 |
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abejgonzalez
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194dd1917a
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add initial setup instructions
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2019-05-28 22:48:40 -07:00 |
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Abraham Gonzalez
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ef65be6c78
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Merge pull request #98 from ucb-bar/rebar-dev-readme
Update README (mainly just have links to the documentation)
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2019-05-28 21:11:52 -07:00 |
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abejgonzalez
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92a7e70750
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fix rocketchip link
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2019-05-28 17:42:05 -07:00 |
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abejgonzalez
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a4010bc512
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Update README (mainly just have links to the documentation)
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2019-05-28 16:08:35 -07:00 |
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Abraham Gonzalez
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dfdeadf96f
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Merge remote-tracking branch 'origin/rebar-dev'
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2019-05-28 14:21:57 -07:00 |
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Abraham Gonzalez
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767e59f382
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Merge pull request #95 from ucb-bar/rebar-dev-multirocc
MultiRoCC Support
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2019-05-28 14:14:08 -07:00 |
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abejgonzalez
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fa080b7857
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fix top level naming
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2019-05-28 12:46:57 -07:00 |
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abejgonzalez
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4ad54ced98
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use varargs instead of seq
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2019-05-28 11:26:56 -07:00 |
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abejgonzalez
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41b4637c29
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build and name hwacha correctly
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2019-05-28 11:26:55 -07:00 |
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abejgonzalez
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7e6591b5ea
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add multi-rocc and show small example
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2019-05-28 11:26:55 -07:00 |
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Abraham Gonzalez
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c5c446f83b
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Merge pull request #93 from ucb-bar/rebar-dev-default-sim-flags
Run Binary Default Flag Change
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2019-05-28 11:25:04 -07:00 |
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Abraham Gonzalez
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45cacd526f
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Merge pull request #92 from ucb-bar/rebar-dev-heter-multicore
Add support for heterogenous SoCs (BOOM + Hwacha)
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2019-05-28 11:24:35 -07:00 |
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Abraham Gonzalez
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ddc962bb26
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Merge pull request #96 from ucb-bar/rebar-dev-docs-update
Update docs
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2019-05-27 20:11:03 -07:00 |
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abejgonzalez
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540afea07a
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fix config naming
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2019-05-27 19:12:07 -07:00 |
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abejgonzalez
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c160f597b7
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spelling check | better heading for accelerators
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2019-05-27 19:07:55 -07:00 |
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abejgonzalez
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d51ab9cde6
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only change default SIM_FLAGS | revert .run and .out flags
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2019-05-27 17:26:44 -07:00 |
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abejgonzalez
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ee62fa8bac
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renamed classes to BoomRocket to clarify | clearer comments | readd the bmark timeout
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2019-05-27 17:21:19 -07:00 |
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Abraham Gonzalez
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3b14ac8706
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minor fixes to links | misc cleanup
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2019-05-27 17:11:10 -07:00 |
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abejgonzalez
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0f34247378
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add section on where to find verilog
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2019-05-27 15:51:25 -07:00 |
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abejgonzalez
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dde22a969b
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add more to docs | 1st spelling pass | more links | proper formatting
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2019-05-27 15:29:09 -07:00 |
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abejgonzalez
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c19855bfa6
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shared heter-subsystem | single example SUB_PROJECT
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2019-05-26 15:46:19 -07:00 |
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abejgonzalez
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c341ffe57d
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remove verbose for default
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2019-05-24 21:22:46 -07:00 |
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abejgonzalez
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08dd5b5375
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update boom to master
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2019-05-24 17:37:16 -07:00 |
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abejgonzalez
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4af9ea9846
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make default flags include timeout | all sims share flags
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2019-05-24 09:47:50 -07:00 |
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abejgonzalez
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5408d6ecbe
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bump boom
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2019-05-23 22:58:28 -07:00 |
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abejgonzalez
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f071b522b2
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ci harness fix for boomexample
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2019-05-23 22:01:50 -07:00 |
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abejgonzalez
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6d622e7555
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add boomrocketexample to ci
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2019-05-23 22:00:04 -07:00 |
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