Merge pull request #95 from ucb-bar/rebar-dev-multirocc

MultiRoCC Support
This commit is contained in:
Abraham Gonzalez
2019-05-28 14:14:08 -07:00
committed by GitHub
3 changed files with 60 additions and 4 deletions

View File

@@ -3,14 +3,18 @@ package example
import chisel3._
import chisel3.util.{log2Up}
import freechips.rocketchip.config.{Parameters, Config}
import freechips.rocketchip.subsystem.{WithRoccExample, WithNMemoryChannels, WithNBigCores, WithRV32}
import freechips.rocketchip.config.{Field, Parameters, Config}
import freechips.rocketchip.subsystem.{RocketTilesKey, WithRoccExample, WithNMemoryChannels, WithNBigCores, WithRV32}
import freechips.rocketchip.diplomacy.{LazyModule, ValName}
import freechips.rocketchip.devices.tilelink.BootROMParams
import freechips.rocketchip.tile.{XLen}
import freechips.rocketchip.tile.{XLen, BuildRoCC, TileKey, LazyRoCC}
import boom.system.{BoomTilesKey}
import testchipip._
import hwacha.{Hwacha}
import sifive.blocks.devices.gpio._
/**
@@ -106,3 +110,41 @@ class WithGPIOBoomRocketTop extends Config((site, here, up) => {
top
}
})
// ------------------
// Multi-RoCC Support
// ------------------
/**
* Map from a hartId to a particular RoCC accelerator
*/
case object MultiRoCCKey extends Field[Map[Int, Seq[Parameters => LazyRoCC]]](Map.empty[Int, Seq[Parameters => LazyRoCC]])
/**
* Mixin to enable different RoCCs based on the hartId
*/
class WithMultiRoCC extends Config((site, here, up) => {
case BuildRoCC => site(MultiRoCCKey).getOrElse(site(TileKey).hartId, Nil)
})
/**
* Mixin to add Hwachas to cores based on hart
*
* For ex:
* Core 0, 1, 2, 3 have been defined earlier
* with hartIds of 0, 1, 2, 3 respectively
* And you call WithMultiRoCCHwacha(0,1)
* Then Core 0 and 1 will get a Hwacha
*
* @param harts harts to specify which will get a Hwacha
*/
class WithMultiRoCCHwacha(harts: Int*) extends Config((site, here, up) => {
case MultiRoCCKey => {
require(harts.max <= ((up(RocketTilesKey, site).length + up(BoomTilesKey, site).length) - 1))
up(MultiRoCCKey, site) ++ harts.distinct.map{ i =>
(i -> Seq((p: Parameters) => {
LazyModule(new Hwacha()(p)).suggestName("hwacha")
}))
}
}
})

View File

@@ -216,6 +216,20 @@ class DualCoreBoomAndOneRocketConfig extends Config(
new freechips.rocketchip.subsystem.WithNBigCores(1) ++
new freechips.rocketchip.system.BaseConfig)
class DualCoreBoomAndOneHwachaRocketConfig extends Config(
new WithNormalBoomRocketTop ++
new WithBootROM ++
new WithMultiRoCC ++
new WithMultiRoCCHwacha(0) ++ // put Hwacha just on hart0 which was renumbered to Rocket
new boom.system.WithRenumberHarts ++
new hwacha.DefaultHwachaConfig ++
new boom.common.WithRVC ++
new boom.common.DefaultBoomConfig ++
new boom.system.WithNBoomCores(2) ++
new freechips.rocketchip.subsystem.WithoutTLMonitors ++
new freechips.rocketchip.subsystem.WithNBigCores(1) ++
new freechips.rocketchip.system.BaseConfig)
class RV32BoomAndRocketConfig extends Config(
new WithNormalBoomRocketTop ++
new WithBootROM ++