Merge pull request #95 from ucb-bar/rebar-dev-multirocc
MultiRoCC Support
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Submodule generators/boom updated: 92313af2a0...2f8c419ff8
@@ -3,14 +3,18 @@ package example
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import chisel3._
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import chisel3.util.{log2Up}
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import freechips.rocketchip.config.{Parameters, Config}
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import freechips.rocketchip.subsystem.{WithRoccExample, WithNMemoryChannels, WithNBigCores, WithRV32}
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import freechips.rocketchip.config.{Field, Parameters, Config}
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import freechips.rocketchip.subsystem.{RocketTilesKey, WithRoccExample, WithNMemoryChannels, WithNBigCores, WithRV32}
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import freechips.rocketchip.diplomacy.{LazyModule, ValName}
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import freechips.rocketchip.devices.tilelink.BootROMParams
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import freechips.rocketchip.tile.{XLen}
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import freechips.rocketchip.tile.{XLen, BuildRoCC, TileKey, LazyRoCC}
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import boom.system.{BoomTilesKey}
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import testchipip._
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import hwacha.{Hwacha}
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import sifive.blocks.devices.gpio._
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/**
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@@ -106,3 +110,41 @@ class WithGPIOBoomRocketTop extends Config((site, here, up) => {
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top
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}
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})
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// ------------------
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// Multi-RoCC Support
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// ------------------
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/**
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* Map from a hartId to a particular RoCC accelerator
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*/
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case object MultiRoCCKey extends Field[Map[Int, Seq[Parameters => LazyRoCC]]](Map.empty[Int, Seq[Parameters => LazyRoCC]])
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/**
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* Mixin to enable different RoCCs based on the hartId
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*/
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class WithMultiRoCC extends Config((site, here, up) => {
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case BuildRoCC => site(MultiRoCCKey).getOrElse(site(TileKey).hartId, Nil)
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})
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/**
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* Mixin to add Hwachas to cores based on hart
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*
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* For ex:
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* Core 0, 1, 2, 3 have been defined earlier
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* with hartIds of 0, 1, 2, 3 respectively
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* And you call WithMultiRoCCHwacha(0,1)
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* Then Core 0 and 1 will get a Hwacha
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*
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* @param harts harts to specify which will get a Hwacha
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*/
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class WithMultiRoCCHwacha(harts: Int*) extends Config((site, here, up) => {
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case MultiRoCCKey => {
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require(harts.max <= ((up(RocketTilesKey, site).length + up(BoomTilesKey, site).length) - 1))
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up(MultiRoCCKey, site) ++ harts.distinct.map{ i =>
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(i -> Seq((p: Parameters) => {
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LazyModule(new Hwacha()(p)).suggestName("hwacha")
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}))
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}
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}
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})
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@@ -216,6 +216,20 @@ class DualCoreBoomAndOneRocketConfig extends Config(
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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class DualCoreBoomAndOneHwachaRocketConfig extends Config(
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new WithNormalBoomRocketTop ++
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new WithBootROM ++
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new WithMultiRoCC ++
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new WithMultiRoCCHwacha(0) ++ // put Hwacha just on hart0 which was renumbered to Rocket
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new boom.system.WithRenumberHarts ++
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new hwacha.DefaultHwachaConfig ++
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new boom.common.WithRVC ++
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new boom.common.DefaultBoomConfig ++
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new boom.system.WithNBoomCores(2) ++
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new freechips.rocketchip.subsystem.WithoutTLMonitors ++
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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class RV32BoomAndRocketConfig extends Config(
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new WithNormalBoomRocketTop ++
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new WithBootROM ++
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