joshua
477e88f95b
new rocketconfig for vx_cache
2023-09-25 23:44:12 -07:00
Richard Yan
1c76515f17
add args.bin and large extmem to config
2023-09-15 11:18:22 -07:00
Richard Yan
59b0994620
bump rocket and update config
2023-09-11 14:06:50 -07:00
Richard Yan
ee00fa11ab
bump rocket-chip and add memory to radiance config
2023-09-09 01:56:17 -07:00
Richard Yan
df4e812b7c
add radiance config and bump rocket
2023-09-08 14:27:06 -07:00
Hansung Kim
3d8a9aa976
Bump rocket-chip after merge
2023-08-23 19:04:21 -07:00
Hansung Kim
241600fea3
Merge remote-tracking branch 'upstream/main' into graphics
2023-08-23 11:51:45 -07:00
Jerry Zhao
fae344e1c1
Merge pull request #1580 from ucb-bar/vcospike
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Support variable VLEN cosim
2023-08-22 17:51:03 -07:00
Jerry Zhao
886b6701a8
Support variable VLEN cosim
2023-08-22 14:55:05 -07:00
Jerry Zhao
68b7c0759a
Merge pull request #1577 from ucb-bar/bumprc
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Bump to latest rocket-chip | integrated fixed-point | pull in stage/phase
2023-08-22 14:51:26 -07:00
Jerry Zhao
5495d05aa0
Bump to latest rocket-chip
2023-08-22 11:28:57 -07:00
Jerry Zhao
a4382e650e
Merge pull request #1578 from ucb-bar/periphery-docs
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Improve: SiFive peripheral device doumentation
2023-08-21 15:55:54 -07:00
-T.K.-
f352ef46f4
ADD: minor fix on GPIO and UART description
2023-08-21 15:33:07 -07:00
-T.K.-
2f7219d41b
ADD: add SPI documentation
2023-08-21 15:27:09 -07:00
-T.K.-
5b561c2d68
ADD: add docs for peripheral devices
2023-08-21 15:21:55 -07:00
Jerry Zhao
ed96a11a26
Merge pull request #1576 from ucb-bar/rocket-async
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Fix asyncqueue depth in ChipLikeRocketConfig
2023-08-16 10:09:57 -07:00
Jerry Zhao
c9ed05057b
Merge pull request #1575 from ucb-bar/bumpspike
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Bump spike to latest
2023-08-15 17:02:07 -07:00
Jerry Zhao
1c80ddd40a
Merge pull request #1574 from ucb-bar/testchipip-bump
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bump testchipip
2023-08-15 15:29:52 -07:00
Jerry Zhao
453903dbc7
Fix asyncqueue depth in ChipLikeRocketConfig
2023-08-15 15:29:04 -07:00
Jerry Zhao
1655b12939
Bump spike to latest
2023-08-15 13:42:49 -07:00
joey0320
2b66c89769
bump testchipip
2023-08-15 11:49:18 -07:00
Jerry Zhao
c745cbc064
Merge pull request #1567 from ucb-bar/rcbump
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Bump rocket-chip
2023-07-31 16:34:46 -07:00
Jerry Zhao
11c8137627
Merge pull request #1569 from ucb-bar/bumps
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Bump testchipip/barstools
2023-07-31 15:15:53 -07:00
Jerry Zhao
57325448d3
Bump boom
2023-07-31 11:51:50 -07:00
Jerry Zhao
0b097d681e
Bump firesim
2023-07-31 10:59:51 -07:00
Jerry Zhao
65ed3c162c
Bump testchipip/barstools
2023-07-31 10:15:56 -07:00
Jerry Zhao
f557730b98
Bump rocket-chip
2023-07-26 17:57:37 -07:00
Jerry Zhao
577b96ba8c
Merge pull request #1531 from ucb-bar/rcbump
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Bump to chisel3.6
2023-07-26 16:35:47 -07:00
Jerry Zhao
ffae2aa824
Bump dsptools
2023-07-26 11:39:13 -07:00
Jerry Zhao
6716e99f46
Bump gemmini
2023-07-25 13:17:41 -07:00
Jerry Zhao
75c8a3250a
Bump gemmini/boom
2023-07-25 09:57:47 -07:00
Jerry Zhao
a612f401e2
Merge remote-tracking branch 'origin/main' into rcbump
2023-07-25 09:30:19 -07:00
Hansung Kim
2e3a2af0c6
run-coalperfs.sh: Fix output directory path
2023-07-22 16:28:34 -07:00
Hansung Kim
016f293da1
Add 2bit-sourceId configs to CoalescerConfigs
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... and add those to run-coalperf.sh
It seemed before that configs with narrower sourceId are more likely to
fail because of more contention between outstanding requests, so test
more of those configs.
2023-07-22 15:41:13 -07:00
Hansung Kim
21a4765866
Bump rocket-chip for sbus connection fix
2023-07-22 15:16:20 -07:00
Hansung Kim
a5b73ba120
Fix faulty merge for RocketConfigs.scala
2023-07-22 15:08:00 -07:00
Hansung Kim
d60dacf6ea
Merge remote-tracking branch 'upstream/main' into graphics
2023-07-22 14:45:48 -07:00
Hansung Kim
5c5c620afc
Bump rocket-chip
2023-07-22 14:38:22 -07:00
Hansung Kim
a63f3b9d1d
Rename GPUConfig->CoalescerConfigs; fix trace filenames
2023-07-22 14:36:50 -07:00
Hansung Kim
d85a651324
run-coalperf.sh: disable 512-bit sbus configs
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Currently Chipyard fails to elaborate with SBus width of 512 bits. It's
unclear if this is a problem in the coalescing unit or in Chipyard in
general. For now, only enable configs that use sbus widths up to 256
bits.
2023-07-22 14:31:57 -07:00
Hansung Kim
cbe982a7ac
run-coalperf.sh: exit on error, use output dir, don't make clean
2023-07-22 14:09:26 -07:00
Hansung Kim
1a4773ecaf
Test with wider 128bit sbus in MemTraceCore
2023-07-22 13:02:22 -07:00
Jerry Zhao
6dc7d6f1c3
Merge pull request #1563 from ucb-bar/fixfifofixing
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Fix FIFO-fixing for PRCI bus
2023-07-20 17:08:30 -07:00
Jerry Zhao
387b51ef95
Put ClockBinder Fragmenters in the correct clock domain
2023-07-20 10:12:40 -07:00
Jerry Zhao
dfb991770a
Fix FIFO-fixing
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Fragmenter infront of FIFO-fixer needs to track way too many source-Ids
2023-07-19 18:41:49 -07:00
Jerry Zhao
47faa5a605
Merge pull request #1530 from ucb-bar/bumpspike
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Bump spike | support M-mode only cosim
2023-07-14 11:26:53 -07:00
Abraham Gonzalez
5b3335ddf4
Merge pull request #1347 from ucb-bar/upf
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UPF Generation
2023-07-12 22:27:50 -07:00
Jerry Zhao
0a6d7b9db1
Bump spike again
2023-07-12 18:33:50 -07:00
Jerry Zhao
4a1418dde2
Support m-mode only cospike
2023-07-12 18:33:50 -07:00
Jerry Zhao
fce7e4c5aa
Bump to latest spike
2023-07-12 18:33:49 -07:00
