Bump barstools to fix a bug in MacroCompiler, bump testchipip to fix a

bug using verilator, make the whitespace consistend in
Makefrag-verilator, explicitly name the verilog sources to match vsim,
and update verisim/Makefile to use the new source variable names
This commit is contained in:
John Wright
2019-02-13 15:31:01 -08:00
committed by John Wright
parent acd76e5410
commit d97afcdfbc
4 changed files with 11 additions and 11 deletions

View File

@@ -29,9 +29,8 @@ rocketchip_csrc_dir = $(ROCKETCHIP_DIR)/src/main/resources/csrc
# Run Verilator to produce a fast binary to emulate this circuit.
VERILATOR := $(INSTALLED_VERILATOR) --cc --exe
VERILATOR_FLAGS := --top-module $(MODEL) \
+define+PRINTF_COND=\$$c\(\"verbose\",\"\&\&\"\,\"done_reset\"\) \
+define+STOP_COND=\$$c\(\"done_reset\"\) --assert \
--output-split 20000 \
+define+PRINTF_COND=\$$c\(\"verbose\",\"\&\&\"\,\"done_reset\"\) \
+define+STOP_COND=\$$c\(\"done_reset\"\) --assert \
--output-split 20000 \
-Wno-STMTDLY --x-assign unique \
-I$(base_dir)/testchipip/vsrc -I$(base_dir)/rocket-chip/vsrc \
-O3 -CFLAGS "$(CXXFLAGS) -DVERILATOR -include $(rocketchip_csrc_dir)/verilator.h"
-O3 -CFLAGS "$(CXXFLAGS) -DVERILATOR -include $(rocketchip_csrc_dir)/verilator.h"