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Update WithBackingScratchpad for firechip

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This commit is contained in:
Jerry Zhao
2023-04-10 15:31:29 -07:00
parent 471f8879d7
commit 1e3d4aad46
3 changed files with 6 additions and 6 deletions
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4
generators/chipyard/src/main/scala/config/RocketConfigs.scala
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@@ -75,14 +75,14 @@ class L1ScratchpadRocketConfig extends Config(
// DOC include start: mbusscratchpadrocket // DOC include start: mbusscratchpadrocket
class MbusScratchpadOnlyRocketConfig extends Config( class MbusScratchpadOnlyRocketConfig extends Config(
new testchipip.WithMbusScratchpad(stripes=2, partitions=2) ++ // add 4 banks mbus backing scratchpad new testchipip.WithMbusScratchpad(banks=2, partitions=2) ++ // add 2 partitions of 2 banks mbus backing scratchpad
new freechips.rocketchip.subsystem.WithNoMemPort ++ // remove offchip mem port new freechips.rocketchip.subsystem.WithNoMemPort ++ // remove offchip mem port
new freechips.rocketchip.subsystem.WithNBigCores(1) ++ new freechips.rocketchip.subsystem.WithNBigCores(1) ++
new chipyard.config.AbstractConfig) new chipyard.config.AbstractConfig)
// DOC include end: mbusscratchpadrocket // DOC include end: mbusscratchpadrocket
class SbusScratchpadRocketConfig extends Config( class SbusScratchpadRocketConfig extends Config(
new testchipip.WithSbusScratchpad(base=0x70000000L, stripes=2, partitions=2) ++ // add 4 lanes sbus backing scratchpad new testchipip.WithSbusScratchpad(base=0x70000000L, banks=4) ++ // add 4 banks sbus backing scratchpad
new freechips.rocketchip.subsystem.WithNBigCores(1) ++ new freechips.rocketchip.subsystem.WithNBigCores(1) ++
new chipyard.config.AbstractConfig) new chipyard.config.AbstractConfig)

6
generators/firechip/src/main/scala/TargetConfigs.scala
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@@ -138,7 +138,7 @@ class WithFireSimConfigTweaks extends Config(
class WithMinimalFireSimHighPerfConfigTweaks extends Config( class WithMinimalFireSimHighPerfConfigTweaks extends Config(
new WithFireSimHighPerfClocking ++ new WithFireSimHighPerfClocking ++
new freechips.rocketchip.subsystem.WithNoMemPort ++ new freechips.rocketchip.subsystem.WithNoMemPort ++
new testchipip.WithBackingScratchpad ++ new testchipip.WithMbusScratchpad ++
new WithMinimalFireSimDesignTweaks new WithMinimalFireSimDesignTweaks
) )
@@ -148,7 +148,7 @@ class WithMinimalFireSimHighPerfConfigTweaks extends Config(
class WithMinimalAndBlockDeviceFireSimHighPerfConfigTweaks extends Config( class WithMinimalAndBlockDeviceFireSimHighPerfConfigTweaks extends Config(
new WithFireSimHighPerfClocking ++ new WithFireSimHighPerfClocking ++
new freechips.rocketchip.subsystem.WithNoMemPort ++ // removes mem port for FASEDBridge to match against new freechips.rocketchip.subsystem.WithNoMemPort ++ // removes mem port for FASEDBridge to match against
new testchipip.WithBackingScratchpad ++ // adds backing scratchpad for memory to replace FASED model new testchipip.WithMbusScratchpad ++ // adds backing scratchpad for memory to replace FASED model
new testchipip.WithBlockDevice(true) ++ // add in block device new testchipip.WithBlockDevice(true) ++ // add in block device
new WithMinimalFireSimDesignTweaks new WithMinimalFireSimDesignTweaks
) )
@@ -329,7 +329,7 @@ class FireSim16LargeBoomConfig extends Config(
class FireSimNoMemPortConfig extends Config( class FireSimNoMemPortConfig extends Config(
new WithDefaultFireSimBridges ++ new WithDefaultFireSimBridges ++
new freechips.rocketchip.subsystem.WithNoMemPort ++ new freechips.rocketchip.subsystem.WithNoMemPort ++
new testchipip.WithBackingScratchpad ++ new testchipip.WithMbusScratchpad ++
new WithFireSimConfigTweaks ++ new WithFireSimConfigTweaks ++
new chipyard.RocketConfig) new chipyard.RocketConfig)

2
generators/testchipip

Submodule generators/testchipip updated: 8a1540ce90...35d7e1969d