Update WithBackingScratchpad for firechip
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@@ -75,14 +75,14 @@ class L1ScratchpadRocketConfig extends Config(
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// DOC include start: mbusscratchpadrocket
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class MbusScratchpadOnlyRocketConfig extends Config(
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new testchipip.WithMbusScratchpad(stripes=2, partitions=2) ++ // add 4 banks mbus backing scratchpad
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new testchipip.WithMbusScratchpad(banks=2, partitions=2) ++ // add 2 partitions of 2 banks mbus backing scratchpad
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // remove offchip mem port
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new chipyard.config.AbstractConfig)
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// DOC include end: mbusscratchpadrocket
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class SbusScratchpadRocketConfig extends Config(
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new testchipip.WithSbusScratchpad(base=0x70000000L, stripes=2, partitions=2) ++ // add 4 lanes sbus backing scratchpad
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new testchipip.WithSbusScratchpad(base=0x70000000L, banks=4) ++ // add 4 banks sbus backing scratchpad
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new chipyard.config.AbstractConfig)
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@@ -138,7 +138,7 @@ class WithFireSimConfigTweaks extends Config(
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class WithMinimalFireSimHighPerfConfigTweaks extends Config(
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new WithFireSimHighPerfClocking ++
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new freechips.rocketchip.subsystem.WithNoMemPort ++
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new testchipip.WithBackingScratchpad ++
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new testchipip.WithMbusScratchpad ++
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new WithMinimalFireSimDesignTweaks
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)
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@@ -148,7 +148,7 @@ class WithMinimalFireSimHighPerfConfigTweaks extends Config(
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class WithMinimalAndBlockDeviceFireSimHighPerfConfigTweaks extends Config(
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new WithFireSimHighPerfClocking ++
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // removes mem port for FASEDBridge to match against
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new testchipip.WithBackingScratchpad ++ // adds backing scratchpad for memory to replace FASED model
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new testchipip.WithMbusScratchpad ++ // adds backing scratchpad for memory to replace FASED model
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new testchipip.WithBlockDevice(true) ++ // add in block device
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new WithMinimalFireSimDesignTweaks
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)
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@@ -329,7 +329,7 @@ class FireSim16LargeBoomConfig extends Config(
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class FireSimNoMemPortConfig extends Config(
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new WithDefaultFireSimBridges ++
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new freechips.rocketchip.subsystem.WithNoMemPort ++
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new testchipip.WithBackingScratchpad ++
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new testchipip.WithMbusScratchpad ++
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new WithFireSimConfigTweaks ++
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new chipyard.RocketConfig)
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Submodule generators/testchipip updated: 8a1540ce90...35d7e1969d
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