Blaise Tine
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1f63139ce5
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fix RTL code undefined variables
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2020-04-03 22:59:40 -07:00 |
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Blaise Tine
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41f3245376
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enable Vortex compiler to support using environment path
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2020-04-03 20:24:57 -04:00 |
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Blaise Tine
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5e54bdffe9
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POCL compiler with relative path
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2020-04-03 17:47:55 -04:00 |
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Blaise Tine
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6ae9a6732b
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-03 15:04:15 -04:00 |
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felsabbagh3
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10e445d459
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Provisioned Prefetching, currently disabled
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2020-04-03 00:30:33 -07:00 |
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Blaise Tine
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c05ea79afa
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-03 00:13:46 -04:00 |
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Blaise Tine
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66a879608e
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udpated OpenCL runtime to include cache flushing
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2020-04-03 00:13:24 -04:00 |
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felsabbagh3
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8ad75e0442
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-02 20:26:46 -07:00 |
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felsabbagh3
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7d1cc5234e
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Fixed dram_fill_accept dependant on input address
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2020-04-02 20:26:37 -07:00 |
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Blaise Tine
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ee77c76785
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-02 20:09:20 -07:00 |
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Blaise Tine
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f590d6acc8
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minor update
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2020-04-02 20:09:08 -07:00 |
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felsabbagh3
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8c1b72691f
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Updated head location to 9-a
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2020-04-02 19:41:53 -07:00 |
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Blaise Tine
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fbda21d5f5
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-02 19:38:49 -07:00 |
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felsabbagh3
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478c3cf21d
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-02 19:19:31 -07:00 |
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felsabbagh3
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0e0b326b31
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Removed bank Hazard Signals
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2020-04-02 19:19:00 -07:00 |
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Blaise Tine
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5b9ee0bb7b
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-02 16:01:52 -07:00 |
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Blaise Tine
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bc6b2969ef
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minor opae hw fixed
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2020-04-02 15:41:12 -07:00 |
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codetector
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abc0624086
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fix makefile
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2020-04-02 14:13:38 -04:00 |
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codetector
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299e3aa72f
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kmeans should compile with new loading methid
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2020-04-02 14:08:57 -04:00 |
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Blaise Tine
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6463cca529
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extending basic test
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2020-04-02 08:46:32 -07:00 |
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Blaise Tine
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efd3c1d154
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udpate
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2020-04-02 06:51:11 -04:00 |
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Blaise Tine
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f7b7c509d5
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udpate
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2020-04-02 05:16:13 -04:00 |
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Blaise Tine
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7e4399e3ac
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OPAE HW full redesign - basic test passing
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2020-04-02 05:10:51 -04:00 |
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felsabbagh3
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7b4b44e5ab
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Fixed DRAM random latency simulator
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2020-03-31 20:33:45 -07:00 |
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felsabbagh3
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1b9d9f3625
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Fixed incorrect miss_add on pipeline stall
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2020-03-31 20:23:09 -07:00 |
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Blaise Tine
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bca5ac5e7f
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enable rtl sim dram stalls
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2020-03-31 02:41:14 -04:00 |
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Blaise Tine
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e92c4b6774
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enable rtl sim dram stalls
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2020-03-31 02:38:18 -04:00 |
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felsabbagh3
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ba8bc95c90
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Newlib update
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2020-03-30 23:08:38 -07:00 |
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felsabbagh3
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bcf894b581
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Demo SOC W=8, T=4 Passing
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2020-03-30 22:17:38 -07:00 |
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felsabbagh3
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66a837b0df
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SOC only 2 errors
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2020-03-30 21:28:40 -07:00 |
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felsabbagh3
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88f2ad53d0
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Fixed simulator includes
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2020-03-30 16:43:26 -07:00 |
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Blaise Tine
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f6eb5dfbae
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refactor RTL sim, added DRAM stalls support
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2020-03-30 04:13:19 -04:00 |
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felsabbagh3
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638625184f
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-03-29 23:46:44 -07:00 |
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felsabbagh3
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ff2b8dba12
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Fixed req_addr width
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2020-03-29 23:46:38 -07:00 |
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Blaise Tine
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0f39d0fcbd
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-03-30 01:53:53 -04:00 |
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Blaise Tine
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2eb19e23c2
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refactor RTL simulator
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2020-03-30 01:53:34 -04:00 |
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felsabbagh3
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ccc65a06fe
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-03-29 21:22:08 -07:00 |
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felsabbagh3
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36895d6e7c
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Fixed miss_add on for snoop replays
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2020-03-29 21:21:53 -07:00 |
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Blaise Tine
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2d198a32c7
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update
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2020-03-29 23:18:26 -04:00 |
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felsabbagh3
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94cc2c10b1
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Snoops shouldn't send fill requests
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2020-03-29 19:16:00 -07:00 |
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felsabbagh3
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e31b2d6d7e
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Fixed pulling signals from different stages
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2020-03-29 18:17:01 -07:00 |
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felsabbagh3
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d31116d584
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Uses use_wb_valid instead of wb_req to include snoops
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2020-03-29 17:59:10 -07:00 |
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felsabbagh3
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71aae3e0a9
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..
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2020-03-29 17:28:57 -07:00 |
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felsabbagh3
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f96d77d75e
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Mismatched vs matched
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2020-03-29 17:18:57 -07:00 |
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felsabbagh3
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a499bcd718
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Added extra signals for debugging
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2020-03-29 17:04:17 -07:00 |
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felsabbagh3
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95ee66f25a
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Fixed Snoop Invalidate Logic
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2020-03-29 16:44:14 -07:00 |
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felsabbagh3
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73390b9f58
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b/unb error
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2020-03-29 16:09:48 -07:00 |
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felsabbagh3
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0a88c97485
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Another reset issue...
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2020-03-29 16:06:13 -07:00 |
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felsabbagh3
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b99ba2c413
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Removed scheduler_empty qualifier
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2020-03-29 15:24:50 -07:00 |
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felsabbagh3
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eb6e0cee43
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Fixing a bug in a fix...
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2020-03-29 13:52:22 -07:00 |
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