Add synthesizable unit test for tensor
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@@ -5,6 +5,8 @@ package radiance.core
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import chisel3._
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import chisel3.util._
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import org.chipsalliance.cde.config.Parameters
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import freechips.rocketchip.unittest.UnitTest
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case class TensorTilingParams(
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// Dimension of the SMEM tile
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@@ -62,7 +64,7 @@ class TensorCoreDecoupled(
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// TODO: just transition every cycle for now
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def nextState(state: TensorState.Type) = state match {
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case TensorState.idle => Mux(io.initiate.fire, TensorState.run, state)
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case TensorState.idle => Mux(io.initiate.fire, TensorState.run, state)
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case TensorState.run => TensorState.finish
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case TensorState.finish => {
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// hold until writeback is cleared
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@@ -136,3 +138,22 @@ class TensorMemResp(val dataWidth: Int) extends Bundle {
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// TODO: tag
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val data = UInt(32.W)
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}
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// synthesizable unit tests
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class TensorCoreDecoupledTest(timeout: Int = 500000)(implicit p: Parameters)
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extends UnitTest(timeout) {
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val dut = Module(new TensorCoreDecoupled(8, 8, TensorTilingParams()))
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dut.io.initiate.valid := io.start
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dut.io.initiate.bits.wid := 0.U
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// TODO
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dut.io.respA.valid := false.B
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dut.io.respA.bits := DontCare
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dut.io.respB.valid := false.B
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dut.io.respB.bits := DontCare
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dut.io.reqA.ready := true.B
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dut.io.reqB.ready := true.B
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dut.io.writeback.ready := true.B
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io.finished := dut.io.writeback.valid
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}
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@@ -1,6 +1,6 @@
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// See LICENSE.SiFive for license details.
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package radiance.memory
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package radiance.unittest
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import chisel3._
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import org.chipsalliance.cde.config._
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@@ -8,6 +8,8 @@ import freechips.rocketchip.subsystem.{BaseSubsystemConfig}
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import freechips.rocketchip.devices.tilelink._
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import freechips.rocketchip.tilelink._
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import freechips.rocketchip.util._
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import radiance.core.TensorCoreDecoupledTest
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import radiance.memory._
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import radiance.subsystem.WithSimtConfig
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import freechips.rocketchip.unittest._
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//import rocket.VortexFatBankTest
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@@ -17,6 +19,16 @@ case object TestDurationMultiplier extends Field[Int]
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class WithTestDuration(x: Int) extends Config((site, here, up) => {
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case TestDurationMultiplier => x
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})
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class WithTensorUnitTests extends Config((site, _, _) => {
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case UnitTests => (q: Parameters) => {
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implicit val p = q
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val timeout = 50000 * site(TestDurationMultiplier)
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Seq(
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Module(new TensorCoreDecoupledTest(timeout=timeout)),
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) }
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})
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class WithCoalescingUnitTests extends Config((site, _, _) => {
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case UnitTests => (q: Parameters) => {
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implicit val p = q
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@@ -52,12 +64,34 @@ class WithCoalescingUnitSynthesisDummy(nLanes: Int) extends Config((site, _, _)
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) }
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})
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class CoalescingUnitTestConfig extends Config(new WithCoalescingUnitTests ++ new WithTestDuration(10) ++ new WithSimtConfig(nMemLanes=4) ++ new BaseSubsystemConfig)
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class TensorUnitTestConfig extends Config(
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new WithTensorUnitTests ++
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new WithTestDuration(10) ++
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new BaseSubsystemConfig)
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class CoalescingUnitTestConfig extends Config(
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new WithCoalescingUnitTests ++
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new WithTestDuration(10) ++
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new WithSimtConfig(nMemLanes=4) ++
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new BaseSubsystemConfig)
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//class VortexFatBankUnitTestConfig extends Config(new WithVortexFatBankUnitTests ++ new WithTestDuration(10) ++ new WithSimtConfig(nLanes=4) ++ new BaseSubsystemConfig)
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// Dummy configs of various sizes for synthesis
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class CoalescingSynthesisDummyLane4Config extends Config(new WithCoalescingUnitSynthesisDummy(4) ++ new WithTestDuration(10) ++ new BaseSubsystemConfig)
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class CoalescingSynthesisDummyLane8Config extends Config(new WithCoalescingUnitSynthesisDummy(8) ++ new WithTestDuration(10) ++ new BaseSubsystemConfig)
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class CoalescingSynthesisDummyLane16Config extends Config(new WithCoalescingUnitSynthesisDummy(16) ++ new WithTestDuration(10) ++ new BaseSubsystemConfig)
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class CoalescingSynthesisDummyLane32Config extends Config(new WithCoalescingUnitSynthesisDummy(32) ++ new WithTestDuration(10) ++ new BaseSubsystemConfig)
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class CoalescingSynthesisDummyLane4Config extends Config(
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new WithCoalescingUnitSynthesisDummy(4) ++
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new WithTestDuration(10) ++
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new BaseSubsystemConfig)
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class CoalescingSynthesisDummyLane8Config extends Config(
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new WithCoalescingUnitSynthesisDummy(8) ++
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new WithTestDuration(10) ++
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new BaseSubsystemConfig)
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class CoalescingSynthesisDummyLane16Config extends Config(
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new WithCoalescingUnitSynthesisDummy(16) ++
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new WithTestDuration(10) ++
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new BaseSubsystemConfig)
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class CoalescingSynthesisDummyLane32Config extends Config(
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new WithCoalescingUnitSynthesisDummy(32) ++
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new WithTestDuration(10) ++
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new BaseSubsystemConfig)
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