Blaise Tine
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31ff70fd4e
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minor updates
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2021-01-05 15:03:41 -08:00 |
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Blaise Tine
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846a4036d3
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minor update
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2021-01-05 05:46:20 -08:00 |
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Blaise Tine
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39bff921be
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cache bug fixes
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2021-01-05 05:04:49 -08:00 |
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Blaise Tine
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762b8e2e3e
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fixed cache mshr critical path
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2021-01-04 12:49:40 -05:00 |
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Blaise Tine
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4d55118545
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cache pipeline optimization - moved tag access to stage0
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2021-01-03 23:10:41 -05:00 |
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Blaise Tine
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9cef1aae04
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cache fill response address is the mshr's top address, no need to store it
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2021-01-03 00:57:24 -05:00 |
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Blaise Tine
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4815ab099c
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using single-port block ram for cache tags, restoring core reset signal
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2021-01-02 19:53:41 -08:00 |
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Blaise Tine
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a825941f51
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Merge branch 'master' of https://github.gatech.edu/casl/Vortex
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2021-01-02 16:06:09 -05:00 |
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Blaise Tine
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2d69ca5d67
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scratchpad optimization for stack access using custom bank offset aligned to stack size
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2021-01-02 16:00:00 -05:00 |
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Blaise Tine
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93c36273fa
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minor update
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2021-01-01 20:24:18 -08:00 |
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Blaise Tine
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b2cfde5d6d
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enabling shared memory back
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2020-12-31 19:19:14 -08:00 |
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Blaise Tine
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abe32ed553
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cache optimization - moved read requests to stage1 and eliminating stage3
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2020-12-31 07:40:58 -08:00 |
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Blaise Tine
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d44144f72f
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FPU float<->int conversion optimization
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2020-12-29 15:37:45 -08:00 |
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Blaise Tine
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b459192dec
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critical path optimization - fpga fmax @4c = ~212 mhz
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2020-12-26 03:28:32 -08:00 |
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Blaise Tine
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3fdc49971c
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minor update
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2020-12-24 09:22:44 -08:00 |
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Blaise Tine
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703a861fe9
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added support for write-through cache, removed cache snooping support
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2020-12-23 23:51:02 -08:00 |
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Blaise Tine
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d956e268b9
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adding new performance counters (banks utilization and DRAM bus utilization)
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2020-12-22 12:33:45 -08:00 |
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Blaise Tine
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4b7d871d62
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allowing partial cache request submissions, io bus support broken
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2020-12-21 03:53:13 -08:00 |
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Blaise Tine
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4bbd7bf408
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performance refactoring - rebalanced stream buffers accross the device to enforce output buffering rule at compoments boudaries, finally resolved block ram R/W collusion discrepencies,
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2020-12-19 02:45:06 -08:00 |
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Blaise Tine
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d81ce8b609
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minor update
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2020-12-09 00:57:31 -08:00 |
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Blaise Tine
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12f7fcfa75
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adding missing files, buffering teh snoop forwarder
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2020-12-09 00:24:32 -08:00 |
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Blaise Tine
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d5438fd591
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merging perf counters
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2020-12-08 21:02:39 -08:00 |
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Blaise Tine
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d5fa82f5e4
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cache req datapath optimizations
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2020-12-08 02:58:08 -08:00 |
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Xandy Liu
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1595ff08e2
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PERF pipeline stalls and cache
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2020-12-08 01:14:41 -05:00 |
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Blaise Tine
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268ad15098
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minor update
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2020-12-06 22:55:17 -08:00 |
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Blaise Tine
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d68b32cd60
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minor update
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2020-12-06 22:40:27 -08:00 |
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Blaise Tine
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1332970636
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refactoring cores clustering
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2020-12-06 14:42:12 -08:00 |
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Blaise Tine
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d0f2a3984d
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adding input buffering to bus arbiters to reduce backpressure delay propagation
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2020-12-05 17:31:29 -08:00 |
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Blaise Tine
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13a5370254
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register file refactoring
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2020-12-05 01:40:50 -08:00 |
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Blaise Tine
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fb60d0af87
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decoupled load/store commits
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2020-12-03 15:08:48 -08:00 |
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Blaise Tine
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0a8f41964d
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minor update
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2020-12-03 08:47:03 -08:00 |
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Blaise Tine
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f3b1069ce8
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adding stream arbiter
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2020-12-03 06:40:23 -08:00 |
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Blaise Tine
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26b5bd10b3
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minor update
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2020-12-01 10:07:26 -08:00 |
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Blaise Tine
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f9d98c5a2b
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fixed bank_core_req_arb critical path.
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2020-12-01 08:47:52 -08:00 |
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Blaise Tine
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f68af3bb84
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using mshr pending request size
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2020-12-01 00:54:25 -08:00 |
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Blaise Tine
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97739e9dcf
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RAM blocks inference fixes
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2020-11-30 14:02:47 -08:00 |
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Blaise Tine
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5758ef9ebf
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generic_register reset network optimization
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2020-11-29 18:41:36 -08:00 |
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Blaise Tine
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def6a35693
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shared memory optimization
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2020-11-29 15:04:31 -08:00 |
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Blaise Tine
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b85391389b
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rename MSRQ to MSHR
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2020-11-28 17:32:00 -05:00 |
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Blaise Tine
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ac1883a13f
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tabs cleanup
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2020-11-28 17:08:01 -05:00 |
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Blaise Tine
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0c3d91ee6d
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minor update
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2020-11-28 03:22:11 -05:00 |
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Blaise Tine
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7a7011d5c6
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minor update (trace log)
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2020-11-23 14:29:35 -05:00 |
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Blaise Tine
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20f22c7446
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scope minor fix
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2020-11-22 11:51:46 -08:00 |
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Blaise Tine
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39f6f2999b
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snp_forwarder fix
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2020-11-22 06:55:45 -08:00 |
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Blaise Tine
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93fb036c4f
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blackbox.sh update
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2020-11-21 16:01:31 -08:00 |
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Blaise Tine
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7ae770f4eb
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config update
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2020-11-21 12:27:42 -08:00 |
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Blaise Tine
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1795980a52
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L2 and L1 using different block size support, RTLsim fixes, dram_rsp_ready optimization
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2020-11-21 09:47:56 -08:00 |
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Blaise Tine
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34b650be94
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fixed shared memory addressing critical path, fixed VX_fp_noncomp output bug
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2020-11-17 00:27:24 -08:00 |
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Blaise Tine
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61add25d96
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minor fix
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2020-11-16 08:23:16 -08:00 |
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Blaise Tine
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6e9c062f4c
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minor fix
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2020-11-16 04:23:30 -08:00 |
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