John Wright d97afcdfbc Bump barstools to fix a bug in MacroCompiler, bump testchipip to fix a ...

bug using verilator, make the whitespace consistend in
Makefrag-verilator, explicitly name the verilog sources to match vsim,
and update verisim/Makefile to use the new source variable names

2019-02-13 21:13:08 -08:00

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