Albert Magyar
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c2ce173195
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Add Verilog MMIO GCD peripheral example
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2019-09-26 01:47:31 -07:00 |
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alonamid
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eae7645159
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sifive generators
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2019-09-25 11:56:26 -07:00 |
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Howard Mao
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2d717bfcae
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add documentation code snippets to example project
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2019-09-12 17:35:40 -07:00 |
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Howard Mao
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646d7cba4c
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use literalinclude directive to pull source directly from example package
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2019-09-11 12:13:08 -07:00 |
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Jerry Zhao
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e7c727372f
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Cleanup configs
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2019-08-26 14:32:08 -07:00 |
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abejgonzalez
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89b312a889
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move boom integration to chipyard
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2019-07-24 22:42:21 -07:00 |
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abejgonzalez
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4ad54ced98
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use varargs instead of seq
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2019-05-28 11:26:56 -07:00 |
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abejgonzalez
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41b4637c29
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build and name hwacha correctly
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2019-05-28 11:26:55 -07:00 |
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abejgonzalez
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7e6591b5ea
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add multi-rocc and show small example
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2019-05-28 11:26:55 -07:00 |
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abejgonzalez
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ee62fa8bac
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renamed classes to BoomRocket to clarify | clearer comments | readd the bmark timeout
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2019-05-27 17:21:19 -07:00 |
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abejgonzalez
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c19855bfa6
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shared heter-subsystem | single example SUB_PROJECT
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2019-05-26 15:46:19 -07:00 |
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abejgonzalez
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612aa48e65
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remove extra imports
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2019-05-23 21:51:42 -07:00 |
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abejgonzalez
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9182c1394a
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update boom | fix comments and remove extra code
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2019-05-23 21:48:07 -07:00 |
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abejgonzalez
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838a34be51
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move subsystem to boom | misc cleanup | bump boom
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2019-05-23 21:47:35 -07:00 |
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abejgonzalez
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cae63ad13f
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working heterogenous cores
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2019-05-23 15:47:52 -07:00 |
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abejgonzalez
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8b3fef85ce
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first attempt at heter. port
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2019-05-23 15:47:52 -07:00 |
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abejgonzalez
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7ba56b58d3
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for now just support verilog build of hwacha (no tests run on it)
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2019-05-13 14:15:05 -07:00 |
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abejgonzalez
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a377c520a6
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smaller rocket For hwacha ci
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2019-05-13 13:34:29 -07:00 |
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Jerry Zhao
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db8b8f50cf
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Move example/utilities to generator directory
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2019-05-10 15:29:28 -07:00 |
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