John Wright
7c7b336c3f
Add SPI flash support ( #546 )
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* Add SPI flash configs, IOBinders, CI tests, and docs
* Add writable SPI flash support
* bump
* Fix CI
* Fix CI
* Update docs/Generators/TestChipIP.rst
Co-authored-by: Chick Markley <chick@qrhino.com >
* Maybe actually fix CI
* Fix broken merge
* Fix the tutorial patch
* bump tcip to master
* fix GPIO naming bug
Co-authored-by: Chick Markley <chick@qrhino.com >
2020-05-14 19:19:50 -07:00
David Biancolin
1b1f477619
Merge pull request #551 from ucb-bar/firrtl-test-jar
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Assemble the firrtl-test.jar and put it in its own directory
2020-05-14 17:30:52 -07:00
David Biancolin
ebe993cefe
Assemble the firrt-test.jar and put it in its own directory
2020-05-14 19:25:21 +00:00
alonamid
3e57a5f539
Merge pull request #544 from ucb-bar/firrtl-1.3-RC-bump
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Rocket Chip Bump with Chisel 3.3 and FIRRTL 1.3
2020-05-13 16:39:50 -07:00
abejgonzalez
460455e790
extend midas examples timeout in ci
2020-05-13 13:18:06 -07:00
alonamid
3fc205997f
bump treadle to master
2020-05-13 11:41:21 -07:00
alonamid
de617d16ed
bump firesim with firrtl 1.3
2020-05-13 11:31:40 -07:00
alonamid
ab8f737540
Merge branch 'firrtl-1.3-RC-bump' of https://github.com/ucb-bar/chipyard into firrtl-1.3-RC-bump
2020-05-13 10:40:55 -07:00
alonamid
afb6518ec2
bump barstools to master with firrtl 1.3
2020-05-13 10:40:02 -07:00
Albert Magyar
d5c1ad4c1f
Bump barstools
2020-05-13 10:38:23 -07:00
alonamid
f0389bbe66
bump boom and ariane to master with RC firrtl 1.3
2020-05-13 10:03:30 -07:00
alonamid
9e95082a8a
bump testchipip with buffer arg
2020-05-13 00:10:23 -07:00
alonamid
933d033569
sifive cache bump to RC firrtl 1.3
2020-05-12 23:34:01 -07:00
David Biancolin
6950ad7cee
Comment out Ariane from ScalaTests
2020-05-12 22:01:14 +00:00
David Biancolin
d16c57867d
Bump FireSim
2020-05-12 22:00:43 +00:00
Albert Magyar
2a6bd3bd5c
Bump verilator to v4.034 ( #547 )
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* Bump verilator to v4.034
* Add new flags to verilator makefile
* Conditionally set timescale flag based on Verilator version
2020-05-11 23:02:37 -07:00
David Biancolin
2fa9a41902
[make] Fix firrtl prerequiste lookup
2020-05-11 03:46:03 +00:00
David Biancolin
57c840f2ab
Merge pull request #549 from ucb-bar/silence-http-warning
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[SBT] Hush up scalasbt resolver http complaint
2020-05-09 11:46:06 -07:00
David Biancolin
0bdf39ffe4
[SBT] Hush up scalasbt resolver http complaint
2020-05-09 04:21:49 +00:00
Colin Schmidt
596925020f
Connect debug clocks when debug is tied off
2020-05-07 11:24:17 -07:00
Colin Schmidt
3c18880064
Increase verilator reset length
2020-05-06 18:39:42 -07:00
Albert Magyar
006ecd2b7c
Basic changes to barstools to get sim to compile
2020-05-06 21:46:25 +00:00
Colin Schmidt
a255417513
Update stage to use Dependency instead of classof
2020-05-05 15:24:51 -07:00
Colin Schmidt
43f6083b69
Many changes to begin the compilation with RC-1.3
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Cores now have an extra CoreParam, useSupervisor which was set to
the default false. Whether a core has supervisor mode is the union
of this and useVM which defaults true so not change was made by this
addition.
BusTopologies are now set with the Config system rather than a system
mixin and so all configs now include the config most similar to the
previous mixin
Testchipip was updated to be able to replace the systembus, in this
new config system, with a ring bus.
The L2 cache repo needed a similar update on how to find the buses.
It currently points to the ucb-bar fork
Treadle is bumped to its release branch
2020-05-05 15:14:24 -07:00
Jerry Zhao
63c46d89c1
Bump sifive-blocks
2020-05-05 13:58:01 -07:00
alonamid
9b94570648
bump rocket chisel (3.3) and firrtl (1.3)
2020-05-05 11:02:28 -07:00
John Wright
794509aba9
[ci skip] Scaladoc and comment fixes ( #542 )
2020-05-04 14:39:05 -07:00
David Biancolin
df9567b6ea
Merge pull request #541 from ucb-bar/sifive-uart-workaround
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Bump FireMarshal to disable SiFive uart driver
2020-05-03 22:26:56 -07:00
David Biancolin
356de57580
Bump FireMarshal to disable SiFive uart driver
2020-05-03 14:25:12 -07:00
Colin Schmidt
658e92e951
[docs] Make the link to initial setup stand out. ( #533 )
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* [docs] Make the link to initial setup stand out.
* [docs] Merge the two quick starts
* More descriptive text about the setup link
Co-authored-by: alonamid <alonamid@eecs.berkeley.edu >
2020-05-01 14:23:16 -07:00
Abraham Gonzalez
02367022b0
Fix "WithHeterCoresSetup" in hetero. docs ( #537 )
2020-04-29 16:25:02 -07:00
Jerry Zhao
24fada1d9c
Add WithNoUART fragment ( #536 )
2020-04-29 01:24:25 -07:00
Howard Mao
959c5a0726
Merge pull request #525 from ucb-bar/unittests
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Get icenet and testchipip unit tests working
2020-04-28 16:34:04 -07:00
Howard Mao
94628e78b2
add icenet and testchipip unit tests to CI
2020-04-28 10:34:29 -07:00
Howard Mao
8df43203a2
separate testchipip ClockUtilTests and TestChipUnitTests
2020-04-28 10:32:28 -07:00
Howard Mao
a905dbedcc
add make rules for running simulator without executable
2020-04-28 10:32:28 -07:00
Howard Mao
b813caf6fd
get icenet and testchipip unit tests working
2020-04-28 10:32:28 -07:00
Abraham Gonzalez
e22ff880e2
[firesim] generate rocket-chip based artefacts ( #534 )
2020-04-27 20:27:36 -07:00
David Biancolin
b042886d46
Merge pull request #528 from ucb-bar/firesim-scalatest
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Make CI use ScalaTest for FireSim
2020-04-27 09:51:02 -07:00
David Biancolin
462f4d0f31
[CI] Disable SBT supershell
2020-04-26 21:11:31 -07:00
David Biancolin
b26ed91b73
[CI] Convert FireSim tests to use ScalaTest
2020-04-26 21:11:31 -07:00
David Biancolin
f30daa4063
[ci] Lengthen hetero tests timeout
2020-04-24 13:33:30 -07:00
Matthias-Raudonis
9d15f2e4e9
Include scripts for dependencies in documentation ( #518 )
2020-04-24 10:10:31 -07:00
David Biancolin
d5b24a25aa
Merge pull request #526 from ucb-bar/misc-sbt-qol
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[SBT] Resolve Warnings about Jgit Resolution
2020-04-24 09:55:34 -07:00
David Biancolin
eeafc82d12
Remove ++<scala-version> per Jack's recommendation
2020-04-23 16:30:50 -07:00
David Biancolin
a67461df7a
[SBT] Quiet down jgit http warnings
2020-04-23 16:30:37 -07:00
Abraham Gonzalez
7b6a45a6a8
[ci] remove approval button for ci jobs ( #521 )
2020-04-20 17:08:15 -07:00
KlepD-SAL
e98ebec30d
Added note about resource usage during elaboration to docs ( #517 )
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On computers with limited resources (like main memory) the elaboration will fail with the message 'make: *** [firrtl_temp] Error 137'. Since no further explaination of the error is given, its meaning should be mentioned in the docs.
2020-04-20 11:47:59 -07:00
Abraham Gonzalez
8469ce62e1
Revert "[ci] bypass approval button on dev/master ( #519 )" ( #520 )
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This reverts commit 0035154168 .
2020-04-18 17:11:13 -07:00
Abraham Gonzalez
0035154168
[ci] bypass approval button on dev/master ( #519 )
2020-04-18 17:09:31 -07:00