Commit Graph

19 Commits

Author SHA1 Message Date
Jerry Zhao
0fa09da5c1 Remove MBus spad from configs that do not support it 2023-12-30 07:03:34 -08:00
Jerry Zhao
604cb6358f Bump fpga-platforms to new organized testchipip 2023-12-19 12:33:37 -08:00
Jerry Zhao
a8766ea8fc Precisely specify bus frequencies 2023-10-31 14:25:16 -07:00
Jerry Zhao
eb3a0aecf4 Add PortAPI between IO and Harness blocks 2023-10-05 15:02:56 -07:00
Jerry Zhao
2077e4304d Explicitly provide refClockFreqMHz to harnessClockInstantiator 2023-05-13 11:18:03 -07:00
Jerry Zhao
607c2b5a73 Unify multi-node btw chipyard/firechip | unify harness clocking 2023-05-12 08:41:34 -07:00
Jerry Zhao
64ad77bbcf Make FPGA flows use the harnessClockInstantiator 2023-05-11 15:04:04 -07:00
Jerry Zhao
e93bc3bed7 Fix Arty FPGA reset harness binder 2023-04-01 13:53:56 -07:00
Jerry Zhao
df2e5ad9dc Bump to latest rocket-chip/chisel3.5.6 2023-03-28 16:48:27 -07:00
Jerry Zhao
85fa9d1120 Add ARTY100t bringup + TSI-over-UART 2023-02-14 15:01:52 -08:00
Lori Li
0724431873 Clean up code 2022-11-30 16:56:09 +09:00
abejgonzalez
b797077334 Fix Arty documentation link 2020-12-27 22:00:06 -08:00
abejgonzalez
8f6de22e72 Fixed TinyRocketConfig | Small cleanup to VCU118/Arty configs 2020-11-23 16:30:39 -08:00
abejgonzalez
661a7701a7 Share DigitalTop/ChipyardSystem | Fix small naming compile error 2020-11-23 15:46:03 -08:00
James Dunn
98fcea7b57 Adding initial Arty documentation; will be expanded further. 2020-11-06 17:25:05 -08:00
abejgonzalez
b0fc0457aa Use Chipyard configs as base (Arty) 2020-11-05 20:46:03 -08:00
abejgonzalez
a281869041 Fix Arty merge and errors from CY bump 2020-11-05 15:04:44 -08:00
James Dunn
dca56cd858 Removing redefinitions of HasHarnessSignalReferences and HasTestHarnessFunctions in TestHarness.scala. 2020-10-10 19:55:02 -07:00
dunn
7d1a1539e6 Initial pass at HarnessBinders for Arty. 2020-10-09 23:17:36 -07:00