Jerry Zhao
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0fa09da5c1
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Remove MBus spad from configs that do not support it
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2023-12-30 07:03:34 -08:00 |
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Jerry Zhao
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604cb6358f
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Bump fpga-platforms to new organized testchipip
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2023-12-19 12:33:37 -08:00 |
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Jerry Zhao
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a8766ea8fc
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Precisely specify bus frequencies
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2023-10-31 14:25:16 -07:00 |
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Jerry Zhao
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eb3a0aecf4
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Add PortAPI between IO and Harness blocks
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2023-10-05 15:02:56 -07:00 |
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Jerry Zhao
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2077e4304d
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Explicitly provide refClockFreqMHz to harnessClockInstantiator
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2023-05-13 11:18:03 -07:00 |
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Jerry Zhao
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607c2b5a73
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Unify multi-node btw chipyard/firechip | unify harness clocking
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2023-05-12 08:41:34 -07:00 |
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Jerry Zhao
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64ad77bbcf
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Make FPGA flows use the harnessClockInstantiator
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2023-05-11 15:04:04 -07:00 |
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Jerry Zhao
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e93bc3bed7
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Fix Arty FPGA reset harness binder
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2023-04-01 13:53:56 -07:00 |
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Jerry Zhao
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df2e5ad9dc
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Bump to latest rocket-chip/chisel3.5.6
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2023-03-28 16:48:27 -07:00 |
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Jerry Zhao
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85fa9d1120
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Add ARTY100t bringup + TSI-over-UART
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2023-02-14 15:01:52 -08:00 |
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Lori Li
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0724431873
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Clean up code
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2022-11-30 16:56:09 +09:00 |
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abejgonzalez
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b797077334
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Fix Arty documentation link
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2020-12-27 22:00:06 -08:00 |
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abejgonzalez
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8f6de22e72
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Fixed TinyRocketConfig | Small cleanup to VCU118/Arty configs
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2020-11-23 16:30:39 -08:00 |
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abejgonzalez
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661a7701a7
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Share DigitalTop/ChipyardSystem | Fix small naming compile error
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2020-11-23 15:46:03 -08:00 |
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James Dunn
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98fcea7b57
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Adding initial Arty documentation; will be expanded further.
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2020-11-06 17:25:05 -08:00 |
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abejgonzalez
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b0fc0457aa
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Use Chipyard configs as base (Arty)
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2020-11-05 20:46:03 -08:00 |
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abejgonzalez
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a281869041
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Fix Arty merge and errors from CY bump
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2020-11-05 15:04:44 -08:00 |
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James Dunn
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dca56cd858
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Removing redefinitions of HasHarnessSignalReferences and HasTestHarnessFunctions in TestHarness.scala.
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2020-10-10 19:55:02 -07:00 |
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dunn
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7d1a1539e6
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Initial pass at HarnessBinders for Arty.
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2020-10-09 23:17:36 -07:00 |
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