abejgonzalez
b8eadb99eb
add back example to rocket system
2019-04-20 21:20:20 -07:00
abejgonzalez
c0b0e293c5
removed boom package and combined into example | removed example from naming | split generator file
2019-04-20 21:18:20 -07:00
abejgonzalez
e9ed53424b
add sifive blocks | add rebar configs for boom
2019-04-19 21:06:32 -07:00
Abraham Gonzalez
b65c2a6704
Merge pull request #55 from ucb-bar/boom-add
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[rebar] add BOOM, riscv-torture, and modify scripts
2019-04-19 16:06:23 -07:00
abejgonzalez
daed74b873
lowercase readme
2019-04-18 20:10:20 -07:00
abejgonzalez
eec137e1ee
make tapeout depend on testchipip for resources
2019-04-18 14:38:57 -07:00
alonamid
6bff4c79c8
Merge pull request #68 from ucb-bar/rebar-dev-clean
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[rebar] fix make clean
2019-04-18 14:29:40 -07:00
abejgonzalez
e4aa81b2f8
fix make clean
2019-04-18 14:25:37 -07:00
abejgonzalez
7faaa56f34
revert condDependsOn | put new firrtl jar into rocket
2019-04-18 11:39:19 -07:00
abejgonzalez
739fcec160
remove csmith scripts
2019-04-17 23:16:04 -07:00
abejgonzalez
46f2cd3f9d
remove debug firrtl prints
2019-04-17 23:14:07 -07:00
abejgonzalez
e8d263c632
Merge remote-tracking branch 'origin/rebar-dev' into boom-add
2019-04-17 23:11:38 -07:00
abejgonzalez
adb8897e35
add firrtl dependency to build.sbt | point to different firrtl jar | a bunch of sbt plugins
2019-04-17 23:11:14 -07:00
Abraham Gonzalez
5b8eb27c80
Merge pull request #67 from ucb-bar/rebar-dev-align
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align rebar with tip of project-template master | fixes build issues
2019-04-17 23:10:12 -07:00
abejgonzalez
e71bf2139f
Update README | add shortcut to build boom
2019-04-17 17:52:31 -07:00
abejgonzalez
885c5f74db
bump boom/firrtl | support building boom | update genfiles in simulator to make rv32 bootrom | misc cleanup
2019-04-17 17:08:08 -07:00
abejgonzalez
80cbdd1d31
Merge remote-tracking branch 'origin/rebar-dev-align' into boom-add
2019-04-17 16:07:02 -07:00
abejgonzalez
68b2da6b3a
update boom | match build.sbt
2019-04-17 16:06:42 -07:00
abejgonzalez
7d887b212c
align rebar with tip of project-template master | fixes build issues
2019-04-17 16:02:44 -07:00
Colin Schmidt
00d8e04d93
Use SBT for barstools instead of jars ( #66 )
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* Use SBT for barstools instead of jars
* Make MACROCOMPILER_MODE a variable
This eases the downstream maintenance burden where `MACROCOMPILER_MODE` is not simply `--mode synflops`
2019-04-16 21:15:00 -07:00
abejgonzalez
30ef609fb8
allow sbt runMain from sbt subproject
2019-04-15 10:17:42 -07:00
abejgonzalez
f45369365b
rename build.sh and move to scripts
2019-04-15 10:17:42 -07:00
abejgonzalez
d80acd8cf8
added boom and torture | added csmith
2019-04-15 10:17:42 -07:00
abejgonzalez
8b899c519d
rename makefiles | move verilog rule to common.mk
2019-04-15 10:17:41 -07:00
abejgonzalez
eb44ae13d4
makefile changes/split | add scripts
2019-04-15 10:17:41 -07:00
alonamid
31e30b2ec7
change dir structure
2019-04-15 10:17:41 -07:00
John Wright
5be8de1288
Build additional annos and fir ( #64 )
2019-03-29 14:00:52 -07:00
Colin Schmidt
3425def36b
Bumps barstools and fixes build system after ( #63 )
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Barstools now handles annotations correctly.
This means that the blackboxresources for the harness
and top are different and need to be merged in the build system.
We also add all Sim*.cc files to default resources as our new emulator
demands. We then remove them from the harness .f file to avoid having
to detect which ones to include selectively.
2019-03-28 11:47:32 -07:00
Colin Schmidt
cf9136de4a
backport ucb-bar/project-template/pull/59
2019-03-28 09:36:16 -07:00
alonamid
419d41239f
Merge pull request #59 from ucb-bar/rebar-srams-fix
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Bump barstools and re-add infer-rw for better SRAM mapping
2019-03-18 09:30:01 -07:00
Colin Schmidt
ffee1f1e98
Bump barstools and re-add infer-rw for better SRAM mapping
2019-03-18 07:31:27 -07:00
alonamid
319d2fedf7
more docs
2019-03-16 00:15:02 -07:00
Abraham Gonzalez
87f9c14dcc
Merge pull request #54 from ucb-bar/misc-changes
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Makefile + Ctags
2019-03-15 18:47:00 -07:00
abejgonzalez
e33f2fcedf
find now follows symlinks
2019-03-12 15:39:19 -07:00
abejgonzalez
c364869563
default to .gitignoring all files in verisim/vsim | read verilator.mk
2019-03-12 14:39:15 -07:00
abejgonzalez
4fd1bfbd56
delete .ctags (have the user put this in their home)
2019-03-12 14:39:15 -07:00
abejgonzalez
2c246af110
rename makefiles | move verilog rule to common.mk
2019-03-12 14:39:15 -07:00
abejgonzalez
82273107c1
makefile changes/split | add scripts
2019-03-12 14:39:15 -07:00
alonamid
49ab106b9e
docs placeholder
2019-03-12 14:30:38 -07:00
alonamid
6ccb3defc1
add toolchains
2019-03-12 14:30:38 -07:00
alonamid
4d62a2b215
docs placeholder
2019-03-12 14:30:38 -07:00
alonamid
2e7791a57d
add chisel and firrtl submodules
2019-03-12 14:30:38 -07:00
alonamid
2def0dfea7
change dir structure
2019-03-12 14:30:38 -07:00
Colin Schmidt
17c38a502a
Help people who want to run tests ( #50 )
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* Help people who want to run tests
* Include generated makefrags for simulation
2019-03-11 11:26:27 -07:00
Paul Rigge
0b7f7b43bc
Merge pull request #52 from ucb-bar/fixAXI
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Fix AXI4 example.
2019-03-07 20:59:05 -08:00
Paul Rigge
61d1798888
Fix AXI4 example.
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I accidentally stumbled into a working AXI4 configuration by multiplying
pbus.beatBytes by 8, but it was fragile. This is the "right way" to add
an AXI4 peripheral.
2019-03-07 20:58:23 -08:00
Paul Rigge
bf23d7aa6c
Fix VCS build.
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VCS doesn't use the same arguments for C headers that verilator uses.
Generate the dot-f file differently for the different simulators.
2019-03-06 23:06:24 -08:00
Paul Rigge
467fdd06e9
Bump to testchipip from a dev branch to master
2019-03-06 23:03:33 -08:00
Paul Rigge
8a522ba404
Fix some build system problems.
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1) Bump testchipip to include forgotten commit
2) Add some support for generating VCS files
3) Fix some makefile deps
2019-03-06 22:10:31 -08:00
Paul Rigge
c7d56c09a0
Bump testchipip to master
2019-03-06 21:15:14 -08:00
