Hansung Kim
aeb4517074
Fix smem script filename
2025-01-31 01:54:51 -08:00
Hansung Kim
c1f922706e
Add flash utilization
2025-01-31 00:49:51 -08:00
Richard Yan
8c228a6a89
sanity script, bump radiance
2025-01-31 00:01:18 -08:00
Hansung Kim
4187738b51
Add missing flash compile and run script
2025-01-30 23:26:23 -08:00
Richard Yan
8e841f3326
update env script
2025-01-30 21:28:24 -08:00
Richard Yan
922c44bfac
utilization calculation
2025-01-30 19:29:20 -08:00
Richard Yan
ce3fa99465
update scripts
2025-01-30 18:03:21 -08:00
Richard Yan
7a88736430
timeout cycles set to 0
2025-01-30 03:34:39 -08:00
Richard Yan
fa076cf517
update smem script, enable 1024 sim
2025-01-30 03:31:20 -08:00
Richard Yan
078a38a906
scripts to compile and run experiments
2025-01-30 02:54:57 -08:00
Richard Yan
4b729b776d
bump radiance and cleanup configs; add print util script
2024-09-26 18:01:07 -07:00
Hansung Kim
3c1ea26625
vcs.mk: Squelch unnamed assertion lint message
2024-08-07 11:18:27 -07:00
Hansung Kim
1e5b468e79
vcs.mk: Ignore null statement lint
2024-05-16 15:50:29 -07:00
Hansung Kim
3dc58def3c
Add parallel flag to VCS/Verilator C compilation
2024-05-07 16:18:30 -07:00
Richard Yan
d0b274ab78
Merge branch 'main' of https://github.com/ucb-bar/chipyard into ucb-bar-main
2024-04-20 02:03:35 -07:00
Richard Yan
e75c77a08a
synthesizable radiance
2024-04-17 18:22:44 -07:00
Hansung Kim
f77f1edecc
Add fpnew packages and include dirs to vcs flags
...
This is necessary because Verilog package definitions need to be compiled before
the modules that reference them, but the compilation order is not enforced with
addResource()s.
2024-04-15 15:31:10 -07:00
Jerry Zhao
4ce6198b86
Pass -top flag to VCS to avoid simulating non-tops
2024-03-19 23:49:08 -07:00
Jerry Zhao
7b3d3e54bd
Add incdirs to vcs/verilator flows
2024-03-19 23:48:51 -07:00
Hansung Kim
0e078b2701
Remove unnecessary make clean in run-radiance.sh
2024-01-17 11:36:40 -08:00
Hansung Kim
3190224cfe
Squelch inout coerce lint messages from vortex RTL
2024-01-16 16:32:30 -08:00
Hansung Kim
0bb2a5c6f2
Accept EXTRA_SIM_PREPROC_DEFINES in run-radiance.sh
2024-01-16 16:31:26 -08:00
Hansung Kim
fdf02063a3
Add scripts for vortex binfile setup and sim runs
2023-12-30 16:36:34 -08:00
Hansung Kim
2e3a2af0c6
run-coalperfs.sh: Fix output directory path
2023-07-22 16:28:34 -07:00
Hansung Kim
016f293da1
Add 2bit-sourceId configs to CoalescerConfigs
...
... and add those to run-coalperf.sh
It seemed before that configs with narrower sourceId are more likely to
fail because of more contention between outstanding requests, so test
more of those configs.
2023-07-22 15:41:13 -07:00
Hansung Kim
d60dacf6ea
Merge remote-tracking branch 'upstream/main' into graphics
2023-07-22 14:45:48 -07:00
Hansung Kim
d85a651324
run-coalperf.sh: disable 512-bit sbus configs
...
Currently Chipyard fails to elaborate with SBus width of 512 bits. It's
unclear if this is a problem in the coalescing unit or in Chipyard in
general. For now, only enable configs that use sbus widths up to 256
bits.
2023-07-22 14:31:57 -07:00
Hansung Kim
cbe982a7ac
run-coalperf.sh: exit on error, use output dir, don't make clean
2023-07-22 14:09:26 -07:00
Abraham Gonzalez and GitHub
c1ad70c10f
Merge pull request #1375 from ucb-bar/use-fat-jar
...
Use fat jar's to remove SBT invocations
2023-05-26 17:03:42 -07:00
abejgonzalez
b65d8ef6c6
Have global location to store jar files (avoid issue with sbt assembly caching)
2023-05-26 13:14:06 -07:00
Jerry Zhao
4da1dea50f
Support multi-binary-run in RTL sim
2023-05-24 16:48:18 -07:00
Vamber Yang
9efd72ee2b
Add more configs for coalescer perf testing
...
Add run-coalperfs.sh in sims/vcs for ease of testing (please delete this file in the future)
2023-05-20 08:52:15 -07:00
Jerry Zhao and GitHub
a0569208a5
Fix VCS waveforms
2023-05-10 15:49:59 -07:00
abejgonzalez
95349755b5
Support TestDriver.v as top
2023-03-13 11:11:23 -07:00
joey0320
a9209c4aaa
Fix TestDriver.v missing from gen-collateral after recompiling
2023-02-21 21:52:03 -08:00
abejgonzalez
55950b61b9
Move sim_files creation after FIRTOOL | Have FIRTOOL delete collateral dir
2023-02-15 12:01:58 -08:00
joey0320
58a6e72528
rename OUT_DIR to GEN_COLLATERAL_DIR
2023-02-13 13:24:04 -08:00
joey0320
6cd46d3c73
fixes
2023-02-13 02:14:23 -08:00
abejgonzalez and joey0320
9f2fd22cc0
Rename variables | Small fixes | Move out-srcs to new dir
2023-01-09 10:32:44 -08:00
abejgonzalez and joey0320
c179f53ed0
Fix comments
2023-01-09 10:25:29 -08:00
abejgonzalez and joey0320
ca88bf5a2f
Fix VCS
2023-01-09 10:25:29 -08:00
Jerry Zhao and GitHub
a72d466646
Add support for FSDB ( #1072 )
2022-01-10 09:24:05 -08:00
abejgonzalez
16cdc88c52
Small comment + org. fix | Remove extra mkdirs
2021-05-12 16:42:05 -07:00
abejgonzalez
a0de9a0cfb
Depend on build_dir
2021-05-06 20:36:28 -07:00
abejgonzalez
95f55a667f
Elaborate comments a bit more | Remove BB'ed files that are auto-copied/added
2021-05-06 14:45:45 -07:00
abejgonzalez
1d52899736
Remove GenerateSimFiles and use make instead
2021-05-06 00:27:11 -07:00
abejgonzalez
b729a5f4a4
Allow run-asm/bmark debug make targets to specify random seed
2021-03-19 17:34:47 -07:00
abejgonzalez
fa97359516
Cleanup VCS's csrc directory | Fix small doc typo
2020-08-21 17:02:06 -07:00
Abraham Gonzalez and GitHub
4f3319dc01
Revert make clean for VCS
2020-08-19 22:16:45 -07:00
Abraham Gonzalez
b7d9472b4a
Cleanup help commands
2020-08-19 22:10:18 -07:00
Hansung Kim