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Merge pull request #1398 from ucb-bar/bump-verilator

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Bump Verilator and use `TestDriver.v` as top
This commit is contained in:
Abraham Gonzalez
2023-05-10 09:10:34 -07:00
committed by GitHub
parent 20250731ea d3f148f1f4
commit f111e2d459
10 changed files with 119 additions and 760 deletions
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2
conda-reqs/chipyard.yaml
View File

@@ -89,7 +89,7 @@ dependencies:
- graphviz
- expect
- dtc
- verilator==4.226
- verilator==5.008
- screen
- elfutils
- libdwarf-dev==0.0.0.20190110_28_ga81397fc4 # from ucb-bar channel - using mainline libdwarf-feedstock

191
conda-reqs/conda-lock-reqs/conda-requirements-esp-tools-linux-64.conda-lock.yml generated
View File

@@ -9,7 +9,7 @@
# To update a single package to the latest version compatible with the version constraints in the source:
# conda-lock lock --lockfile conda-requirements-esp-tools-linux-64.conda-lock.yml --update PACKAGE
# To re-solve the entire environment, e.g. after changing a version constraint in the source file:
# conda-lock -f /bwrcq/C/harrisonliew/chipyard-new-hammer/conda-reqs/chipyard.yaml -f /bwrcq/C/harrisonliew/chipyard-new-hammer/conda-reqs/esp-tools.yaml -f /scratch/abejgonza/cy/conda-reqs/chipyard.yaml -f /scratch/abejgonza/cy/conda-reqs/esp-tools.yaml --lockfile conda-requirements-esp-tools-linux-64.conda-lock.yml
# conda-lock -f /scratch/abejgonza/cy/conda-reqs/chipyard.yaml -f /scratch/abejgonza/cy/conda-reqs/esp-tools.yaml --lockfile conda-requirements-esp-tools-linux-64.conda-lock.yml
metadata:
channels:
- url: ucb-bar
@@ -21,12 +21,10 @@ metadata:
- url: nodefaults
used_env_vars: []
content_hash:
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linux-64: 86382a6fa6e58883c85e482f6c209ab347df1461d7c5706f28b95813412dfe94
platforms:
- linux-64
sources:
- /bwrcq/C/harrisonliew/chipyard-new-hammer/conda-reqs/chipyard.yaml
- /bwrcq/C/harrisonliew/chipyard-new-hammer/conda-reqs/esp-tools.yaml
- /scratch/abejgonza/cy/conda-reqs/chipyard.yaml
- /scratch/abejgonza/cy/conda-reqs/esp-tools.yaml
package:
@@ -528,18 +526,6 @@ package:
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/icu-72.1-hcb278e6_0.conda
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dependencies:
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manager: conda
name: jpeg
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/jpeg-9e-h0b41bf4_3.conda
version: 9e
- category: main
dependencies:
libgcc-ng: '>=10.3.0'
@@ -1828,22 +1814,6 @@ package:
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/liblapack-3.9.0-16_linux64_openblas.tar.bz2
version: 3.9.0
- category: main
dependencies:
libgcc-ng: '>=12'
libstdcxx-ng: '>=12'
libxml2: '>=2.10.3,<2.11.0a0'
libzlib: '>=1.2.13,<1.3.0a0'
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name: libllvm15
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platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/libllvm15-15.0.7-hadd5161_1.conda
version: 15.0.7
- category: main
dependencies:
libgcc-ng: '>=12'
@@ -2523,21 +2493,6 @@ package:
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url: https://conda.anaconda.org/conda-forge/linux-64/lcms2-2.15-haa2dc70_1.conda
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- category: main
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libgcc-ng: '>=12'
libllvm15: '>=15.0.7,<15.1.0a0'
libstdcxx-ng: '>=12'
libzlib: '>=1.2.13,<1.3.0a0'
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manager: conda
name: libclang-cpp15
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platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/libclang-cpp15-15.0.7-default_had23c3d_1.conda
version: 15.0.7
- category: main
dependencies:
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manager: conda
name: pyjwt
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platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/pyjwt-2.6.0-pyhd8ed1ab_0.tar.bz2
version: 2.6.0
url: https://conda.anaconda.org/conda-forge/noarch/pyjwt-2.7.0-pyhd8ed1ab_0.conda
version: 2.7.0
- category: main
dependencies:
python: '>=3.3'
@@ -3266,18 +3221,6 @@ package:
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/types-urllib3-1.26.25.12-pyhd8ed1ab_0.conda
version: 1.26.25.12
- category: main
dependencies:
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hash:
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sha256: ec1cfe0b7dc55a22223562cad799e0b16d122dab611c9923b6068d27a784ba2f
manager: conda
name: typing
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/typing-3.10.0.0-pyhd8ed1ab_0.tar.bz2
version: 3.10.0.0
- category: main
dependencies:
python: '>=3.7'
@@ -3310,18 +3253,19 @@ package:
gxx_impl_linux-64: ''
libgcc-ng: '>=12'
libstdcxx-ng: '>=12'
libzlib: '>=1.2.12,<1.3.0a0'
libzlib: '>=1.2.13,<1.3.0a0'
make: ''
perl: ''
python: ''
hash:
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sha256: e2f2302d69c0d6928d95a1c699b5ef0b14e0243e78495734962c78136d2e6b9f
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sha256: c24f5fc704ee3c0737456e7a4b8f75114b25a51812c6f801a22ed43652e0b211
manager: conda
name: verilator
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/verilator-4.226-he0ac6c6_1.tar.bz2
version: '4.226'
url: https://conda.anaconda.org/conda-forge/linux-64/verilator-5.008-h514fc35_1.conda
version: '5.008'
- category: main
dependencies:
python: ''
@@ -3455,19 +3399,6 @@ package:
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/zipp-3.15.0-pyhd8ed1ab_0.conda
version: 3.15.0
- category: main
dependencies:
python: '>=3.6'
typing_extensions: '>=4.0'
hash:
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sha256: be2dbd6710438fa48b83bf06841091227276ae545d145dfe5cb5149c6484e951
manager: conda
name: aioitertools
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/aioitertools-0.11.0-pyhd8ed1ab_0.tar.bz2
version: 0.11.0
- category: main
dependencies:
frozenlist: '>=1.1.0'
@@ -3537,22 +3468,6 @@ package:
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/cffi-1.15.1-py39he91dace_3.conda
version: 1.15.1
- category: main
dependencies:
libclang-cpp15: '>=15.0.7,<15.1.0a0'
libgcc-ng: '>=12'
libllvm15: '>=15.0.7,<15.1.0a0'
libstdcxx-ng: '>=12'
libzlib: '>=1.2.13,<1.3.0a0'
hash:
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sha256: eee53b98b40099c9289a732f6c915f9c80714d8a7a8a977f921c0782c6f5200f
manager: conda
name: clang-format-15
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/clang-format-15-15.0.7-default_had23c3d_1.conda
version: 15.0.7
- category: main
dependencies:
libclang-cpp16: '>=16.0.3,<16.1.0a0'
@@ -3823,22 +3738,6 @@ package:
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/junit-xml-1.9-pyh9f0ad1d_0.tar.bz2
version: '1.9'
- category: main
dependencies:
libclang13: 15.0.7 default_h3e3d535_1
libgcc-ng: '>=12'
libllvm15: '>=15.0.7,<15.1.0a0'
libstdcxx-ng: '>=12'
libzlib: '>=1.2.13,<1.3.0a0'
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sha256: eba3ed760c72c992a04d86455556ecb90c0e1e3688defcac44b28a848d71651c
manager: conda
name: libclang
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/libclang-15.0.7-default_had23c3d_1.conda
version: 15.0.7
- category: main
dependencies:
expat: '>=2.5.0,<3.0a0'
@@ -3999,14 +3898,14 @@ package:
ruamel.yaml.clib: '>=0.1.2'
setuptools: ''
hash:
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sha256: f1deff6ee893729e4c1b1005a60fea55907bbdbca2d3c88263ac65ff3ea25c55
manager: conda
name: ruamel.yaml
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/ruamel.yaml-0.17.24-py39hd1e30aa_0.conda
version: 0.17.24
url: https://conda.anaconda.org/conda-forge/linux-64/ruamel.yaml-0.17.25-py39hd1e30aa_0.conda
version: 0.17.25
- category: main
dependencies:
colorama: ''
@@ -4974,14 +4873,14 @@ package:
python-dateutil: '>=2.1,<3.0.0'
urllib3: '>=1.25.4,<1.27'
hash:
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md5: 7da51e7dabbb80ebe3064e9343e8e818
sha256: 1806dfc46c9f4b51ff56575025e7e5491ee630a6be5997dd1536009585da4c4c
manager: conda
name: botocore
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/botocore-1.29.130-pyhd8ed1ab_0.conda
version: 1.29.130
url: https://conda.anaconda.org/conda-forge/noarch/botocore-1.29.131-pyhd8ed1ab_0.conda
version: 1.29.131
- category: main
dependencies:
cairo: '>=1.16.0,<2.0a0'
@@ -5028,22 +4927,6 @@ package:
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/requests-2.29.0-pyhd8ed1ab_0.conda
version: 2.29.0
- category: main
dependencies:
aiohttp: '>=3.3.1'
aioitertools: '>=0.5.1'
botocore: '>=1.27.59,<1.27.60'
python: '>=3.6'
wrapt: '>=1.10.10'
hash:
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sha256: 76068553358b26c9c03be992cbe982a369d1e015a53700f092db92c784ce98a9
manager: conda
name: aiobotocore
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/aiobotocore-2.4.2-pyhd8ed1ab_0.conda
version: 2.4.2
- category: main
dependencies:
botocore: '>=1.11.3'
@@ -5229,7 +5112,7 @@ package:
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dependencies:
botocore: 1.29.130
botocore: 1.29.131
colorama: '>=0.2.5,<0.4.5'
docutils: '>=0.10,<0.17'
python: '>=3.9,<3.10.0a0'
@@ -5238,29 +5121,29 @@ package:
rsa: '>=3.1.2,<4.8'
s3transfer: '>=0.6.0,<0.7.0'
hash:
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manager: conda
name: awscli
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platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/awscli-1.27.130-py39hf3d152e_0.conda
version: 1.27.130
url: https://conda.anaconda.org/conda-forge/linux-64/awscli-1.27.131-py39hf3d152e_0.conda
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botocore: '>=1.29.131,<1.30.0'
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name: boto3
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platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/boto3-1.26.130-pyhd8ed1ab_0.conda
version: 1.26.130
url: https://conda.anaconda.org/conda-forge/noarch/boto3-1.26.131-pyhd8ed1ab_0.conda
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@@ -5545,13 +5428,13 @@ package:
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manager: pip
name: mock
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platform: linux-64
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@@ -5596,15 +5479,15 @@ package:
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dependencies:
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ruamel.yaml.clib: '>=0.2.7'
hash:
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manager: pip
name: ruamel.yaml
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platform: linux-64
url: https://files.pythonhosted.org/packages/9e/cb/938214ac358fbef7058343b3765c79a1b7ed0c366f7f992ce7ff38335652/ruamel.yaml-0.17.21-py3-none-any.whl
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191
conda-reqs/conda-lock-reqs/conda-requirements-riscv-tools-linux-64.conda-lock.yml generated
View File

@@ -9,7 +9,7 @@
# To update a single package to the latest version compatible with the version constraints in the source:
# conda-lock lock --lockfile conda-requirements-riscv-tools-linux-64.conda-lock.yml --update PACKAGE
# To re-solve the entire environment, e.g. after changing a version constraint in the source file:
# conda-lock -f /bwrcq/C/harrisonliew/chipyard-new-hammer/conda-reqs/chipyard.yaml -f /bwrcq/C/harrisonliew/chipyard-new-hammer/conda-reqs/riscv-tools.yaml -f /scratch/abejgonza/cy/conda-reqs/chipyard.yaml -f /scratch/abejgonza/cy/conda-reqs/riscv-tools.yaml --lockfile conda-requirements-riscv-tools-linux-64.conda-lock.yml
# conda-lock -f /scratch/abejgonza/cy/conda-reqs/chipyard.yaml -f /scratch/abejgonza/cy/conda-reqs/riscv-tools.yaml --lockfile conda-requirements-riscv-tools-linux-64.conda-lock.yml
metadata:
channels:
- url: ucb-bar
@@ -21,12 +21,10 @@ metadata:
- url: nodefaults
used_env_vars: []
content_hash:
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linux-64: 92c3e7798f0b770b5c7c3ccb9bb821f7aca74819a9dba397e47d752af976b25f
platforms:
- linux-64
sources:
- /bwrcq/C/harrisonliew/chipyard-new-hammer/conda-reqs/chipyard.yaml
- /bwrcq/C/harrisonliew/chipyard-new-hammer/conda-reqs/riscv-tools.yaml
- /scratch/abejgonza/cy/conda-reqs/chipyard.yaml
- /scratch/abejgonza/cy/conda-reqs/riscv-tools.yaml
package:
@@ -528,18 +526,6 @@ package:
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url: https://conda.anaconda.org/conda-forge/linux-64/icu-72.1-hcb278e6_0.conda
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name: jpeg
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platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/jpeg-9e-h0b41bf4_3.conda
version: 9e
- category: main
dependencies:
libgcc-ng: '>=10.3.0'
@@ -1828,22 +1814,6 @@ package:
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/liblapack-3.9.0-16_linux64_openblas.tar.bz2
version: 3.9.0
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dependencies:
libgcc-ng: '>=12'
libstdcxx-ng: '>=12'
libxml2: '>=2.10.3,<2.11.0a0'
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name: libllvm15
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/libllvm15-15.0.7-hadd5161_1.conda
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dependencies:
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@@ -2506,21 +2476,6 @@ package:
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url: https://conda.anaconda.org/conda-forge/linux-64/lcms2-2.15-haa2dc70_1.conda
version: '2.15'
- category: main
dependencies:
libgcc-ng: '>=12'
libllvm15: '>=15.0.7,<15.1.0a0'
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libzlib: '>=1.2.13,<1.3.0a0'
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name: libclang-cpp15
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/libclang-cpp15-15.0.7-default_had23c3d_1.conda
version: 15.0.7
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dependencies:
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sha256: f3a64306fa0f405f10f4108d7ff42043d6fd393f940f9e98e395a3756687fc98
manager: conda
name: pyjwt
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/pyjwt-2.6.0-pyhd8ed1ab_0.tar.bz2
version: 2.6.0
url: https://conda.anaconda.org/conda-forge/noarch/pyjwt-2.7.0-pyhd8ed1ab_0.conda
version: 2.7.0
- category: main
dependencies:
python: '>=3.3'
@@ -3268,18 +3223,6 @@ package:
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/types-urllib3-1.26.25.12-pyhd8ed1ab_0.conda
version: 1.26.25.12
- category: main
dependencies:
python: '>=3'
hash:
md5: e6573ac68718f17b9d4f5c8eda3190f2
sha256: ec1cfe0b7dc55a22223562cad799e0b16d122dab611c9923b6068d27a784ba2f
manager: conda
name: typing
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/typing-3.10.0.0-pyhd8ed1ab_0.tar.bz2
version: 3.10.0.0
- category: main
dependencies:
python: '>=3.7'
@@ -3312,18 +3255,19 @@ package:
gxx_impl_linux-64: ''
libgcc-ng: '>=12'
libstdcxx-ng: '>=12'
libzlib: '>=1.2.12,<1.3.0a0'
libzlib: '>=1.2.13,<1.3.0a0'
make: ''
perl: ''
python: ''
hash:
md5: 41af6df1758bae89161daf268566384e
sha256: e2f2302d69c0d6928d95a1c699b5ef0b14e0243e78495734962c78136d2e6b9f
md5: efb0e7909f1a41159856e688e216bd26
sha256: c24f5fc704ee3c0737456e7a4b8f75114b25a51812c6f801a22ed43652e0b211
manager: conda
name: verilator
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/verilator-4.226-he0ac6c6_1.tar.bz2
version: '4.226'
url: https://conda.anaconda.org/conda-forge/linux-64/verilator-5.008-h514fc35_1.conda
version: '5.008'
- category: main
dependencies:
python: ''
@@ -3457,19 +3401,6 @@ package:
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/zipp-3.15.0-pyhd8ed1ab_0.conda
version: 3.15.0
- category: main
dependencies:
python: '>=3.6'
typing_extensions: '>=4.0'
hash:
md5: 59c40397276a286241c65faec5e1be3c
sha256: be2dbd6710438fa48b83bf06841091227276ae545d145dfe5cb5149c6484e951
manager: conda
name: aioitertools
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/aioitertools-0.11.0-pyhd8ed1ab_0.tar.bz2
version: 0.11.0
- category: main
dependencies:
frozenlist: '>=1.1.0'
@@ -3539,22 +3470,6 @@ package:
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/cffi-1.15.1-py310h255011f_3.conda
version: 1.15.1
- category: main
dependencies:
libclang-cpp15: '>=15.0.7,<15.1.0a0'
libgcc-ng: '>=12'
libllvm15: '>=15.0.7,<15.1.0a0'
libstdcxx-ng: '>=12'
libzlib: '>=1.2.13,<1.3.0a0'
hash:
md5: d2fcc7c0381194ca6fcb38a6d06255b8
sha256: eee53b98b40099c9289a732f6c915f9c80714d8a7a8a977f921c0782c6f5200f
manager: conda
name: clang-format-15
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/clang-format-15-15.0.7-default_had23c3d_1.conda
version: 15.0.7
- category: main
dependencies:
libclang-cpp16: '>=16.0.3,<16.1.0a0'
@@ -3812,22 +3727,6 @@ package:
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/junit-xml-1.9-pyh9f0ad1d_0.tar.bz2
version: '1.9'
- category: main
dependencies:
libclang13: 15.0.7 default_h3e3d535_1
libgcc-ng: '>=12'
libllvm15: '>=15.0.7,<15.1.0a0'
libstdcxx-ng: '>=12'
libzlib: '>=1.2.13,<1.3.0a0'
hash:
md5: 36c65ed73b7c92589bd9562ef8a6023d
sha256: eba3ed760c72c992a04d86455556ecb90c0e1e3688defcac44b28a848d71651c
manager: conda
name: libclang
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/libclang-15.0.7-default_had23c3d_1.conda
version: 15.0.7
- category: main
dependencies:
expat: '>=2.5.0,<3.0a0'
@@ -3988,14 +3887,14 @@ package:
ruamel.yaml.clib: '>=0.1.2'
setuptools: ''
hash:
md5: 016fdbee5680173ec0ffa6b71317fc7f
sha256: 3f96af373139edd176fd6b8478f3b8934005674f50e2a0422e355b77c9152e27
md5: 475a6b5d3a01fc0d7d494ccd94db0b1d
sha256: 90ea9bbd357fa206ac07623f57d990adb318a43bc402a85d31bcb907552e2b5e
manager: conda
name: ruamel.yaml
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/ruamel.yaml-0.17.24-py310h2372a71_0.conda
version: 0.17.24
url: https://conda.anaconda.org/conda-forge/linux-64/ruamel.yaml-0.17.25-py310h2372a71_0.conda
version: 0.17.25
- category: main
dependencies:
colorama: ''
@@ -4949,14 +4848,14 @@ package:
python-dateutil: '>=2.1,<3.0.0'
urllib3: '>=1.25.4,<1.27'
hash:
md5: b6cdb2c025e2a44462c7f0f4ee1502a8
sha256: 1a92aaf1e978b1a219726fd9747cd43d43aed2d3aee9932be0d8b79a66e5ea83
md5: 7da51e7dabbb80ebe3064e9343e8e818
sha256: 1806dfc46c9f4b51ff56575025e7e5491ee630a6be5997dd1536009585da4c4c
manager: conda
name: botocore
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/botocore-1.29.130-pyhd8ed1ab_0.conda
version: 1.29.130
url: https://conda.anaconda.org/conda-forge/noarch/botocore-1.29.131-pyhd8ed1ab_0.conda
version: 1.29.131
- category: main
dependencies:
cairo: '>=1.16.0,<2.0a0'
@@ -5003,22 +4902,6 @@ package:
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/requests-2.29.0-pyhd8ed1ab_0.conda
version: 2.29.0
- category: main
dependencies:
aiohttp: '>=3.3.1'
aioitertools: '>=0.5.1'
botocore: '>=1.29.76,<1.29.77'
python: '>=3.7'
wrapt: '>=1.10.10'
hash:
md5: 7e3b07efee162390a72ef004440198c1
sha256: 1e301342489a5c01fcc823e27a7b835eb7a953f827ff0d4253fb4493476f1569
manager: conda
name: aiobotocore
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/aiobotocore-2.5.0-pyhd8ed1ab_0.conda
version: 2.5.0
- category: main
dependencies:
botocore: '>=1.11.3'
@@ -5204,7 +5087,7 @@ package:
version: 5.1.1
- category: main
dependencies:
botocore: 1.29.130
botocore: 1.29.131
colorama: '>=0.2.5,<0.4.5'
docutils: '>=0.10,<0.17'
python: '>=3.10,<3.11.0a0'
@@ -5213,29 +5096,29 @@ package:
rsa: '>=3.1.2,<4.8'
s3transfer: '>=0.6.0,<0.7.0'
hash:
md5: 73d250b9c5952035e0583db4a5b91895
sha256: af8a05666cfc0376c503d9ec9bbec05205d699226c12d598a719325c249fb688
md5: a8803614b98f834dd8e9239b1c172bb1
sha256: 627c4db1e6c5e2febb5b9a7acf92b68a3c26afc26800700b510e076c46c02129
manager: conda
name: awscli
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/linux-64/awscli-1.27.130-py310hff52083_0.conda
version: 1.27.130
url: https://conda.anaconda.org/conda-forge/linux-64/awscli-1.27.131-py310hff52083_0.conda
version: 1.27.131
- category: main
dependencies:
botocore: '>=1.29.130,<1.30.0'
botocore: '>=1.29.131,<1.30.0'
jmespath: '>=0.7.1,<2.0.0'
python: '>=3.7'
s3transfer: '>=0.6.0,<0.7.0'
hash:
md5: b41eaaaf0f77cce83052e5cfa841251c
sha256: 29588b211401de9dc34318bbb00eeb946e6961afb74f1097ec1ed24948300116
md5: f51fe6d09662dc8ec9672be8567b7430
sha256: 888fa362ba6db8b881a200539c1cc4379379ec1937168e5e475245fa1a3544c7
manager: conda
name: boto3
optional: false
platform: linux-64
url: https://conda.anaconda.org/conda-forge/noarch/boto3-1.26.130-pyhd8ed1ab_0.conda
version: 1.26.130
url: https://conda.anaconda.org/conda-forge/noarch/boto3-1.26.131-pyhd8ed1ab_0.conda
version: 1.26.131
- category: main
dependencies:
cachecontrol: 0.12.11 pyhd8ed1ab_1
@@ -5520,13 +5403,13 @@ package:
- category: main
dependencies: {}
hash:
sha256: c41cfb1e99ba5d341fbcc5308836e7d7c9786d302f995b2c271ce2144dece9eb
sha256: 0e0bc5ba78b8db3667ad636d964eb963dc97a59f04c6f6214c5f0e4a8f726c56
manager: pip
name: mock
optional: false
platform: linux-64
url: https://files.pythonhosted.org/packages/e6/88/8a05e7ad0bb823246b2add3d2e97f990c41c71a40762c8db77a4bd78eedf/mock-5.0.1-py3-none-any.whl
version: 5.0.1
url: https://files.pythonhosted.org/packages/27/6f/fbb16f260a7107ee98871d83f6793d88c4311b7189b10ef239da0b2181db/mock-5.0.2-py3-none-any.whl
version: 5.0.2
- dependencies: {}
hash:
sha256: f84fbc98b019fef2ee9a1cb3ce93e3187a6df0b2538a651bfb890254ba9f90b5
@@ -5571,15 +5454,15 @@ package:
version: 2.8.10
- category: main
dependencies:
ruamel.yaml.clib: '>=0.2.6'
ruamel.yaml.clib: '>=0.2.7'
hash:
sha256: 742b35d3d665023981bd6d16b3d24248ce5df75fdb4e2924e93a05c1f8b61ca7
sha256: 25d0ee82a0a9a6f44683dcf8c282340def4074a4562f3a24f55695bb254c1693
manager: pip
name: ruamel.yaml
optional: false
platform: linux-64
url: https://files.pythonhosted.org/packages/9e/cb/938214ac358fbef7058343b3765c79a1b7ed0c366f7f992ce7ff38335652/ruamel.yaml-0.17.21-py3-none-any.whl
version: 0.17.21
url: https://files.pythonhosted.org/packages/23/33/dbc62343de0cf92e0f9c15bc0a287bdaea0953f1cadca0480c78d5ac6641/ruamel.yaml-0.17.26-py3-none-any.whl
version: 0.17.26
- category: main
dependencies:
mock: '*'

394
generators/chipyard/src/main/resources/csrc/emulator.cc
View File

@@ -1,394 +0,0 @@
// See LICENSE.SiFive for license details.
// See LICENSE.Berkeley for license details.
#if VM_TRACE
#include <memory>
#if CY_FST_TRACE
#include "verilated_fst_c.h"
#else
#include "verilated.h"
#include "verilated_vcd_c.h"
#endif // CY_FST_TRACE
#endif // VM_TRACE
#include <fesvr/dtm.h>
#include <fesvr/tsi.h>
#include "remote_bitbang.h"
#include <iostream>
#include <fcntl.h>
#include <signal.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <getopt.h>
// For option parsing, which is split across this file, Verilog, and
// FESVR's HTIF, a few external files must be pulled in. The list of
// files and what they provide is enumerated:
//
// $RISCV/include/fesvr/htif.h:
// defines:
// - HTIF_USAGE_OPTIONS
// - HTIF_LONG_OPTIONS_OPTIND
// - HTIF_LONG_OPTIONS
// $(ROCKETCHIP_DIR)/generated-src(-debug)?/$(CONFIG).plusArgs:
// defines:
// - PLUSARG_USAGE_OPTIONS
// variables:
// - static const char * verilog_plusargs
extern tsi_t* tsi;
extern dtm_t* dtm;
extern remote_bitbang_t * jtag;
static uint64_t trace_count = 0;
bool verbose = false;
bool done_reset = false;
void handle_sigterm(int sig)
{
dtm->stop();
}
double sc_time_stamp()
{
return trace_count;
}
static void usage(const char * program_name)
{
printf("Usage: %s [EMULATOR OPTION]... [VERILOG PLUSARG]... [HOST OPTION]... BINARY [TARGET OPTION]...\n",
program_name);
fputs("\
Run a BINARY on the Rocket Chip emulator.\n\
\n\
Mandatory arguments to long options are mandatory for short options too.\n\
\n\
EMULATOR OPTIONS\n\
-c, --cycle-count Print the cycle count before exiting\n\
+cycle-count\n\
-h, --help Display this help and exit\n\
-m, --max-cycles=CYCLES Kill the emulation after CYCLES\n\
+max-cycles=CYCLES\n\
-s, --seed=SEED Use random number seed SEED\n\
-r, --rbb-port=PORT Use PORT for remote bit bang (with OpenOCD and GDB) \n\
If not specified, a random port will be chosen\n\
automatically.\n\
-V, --verbose Enable all Chisel printfs (cycle-by-cycle info)\n\
+verbose\n\
", stdout);
#if VM_TRACE == 0
fputs("\
\n\
EMULATOR DEBUG OPTIONS (only supported in debug build -- try `make debug`)\n",
stdout);
#endif
fputs("\
-v, --vcd=FILE, Write vcd trace to FILE (or '-' for stdout)\n\
-x, --dump-start=CYCLE Start VCD tracing at CYCLE\n\
+dump-start\n\
", stdout);
fputs("\n" PLUSARG_USAGE_OPTIONS, stdout);
fputs("\n" HTIF_USAGE_OPTIONS, stdout);
printf("\n"
"EXAMPLES\n"
" - run a bare metal test:\n"
" %s $RISCV/riscv64-unknown-elf/share/riscv-tests/isa/rv64ui-p-add\n"
" - run a bare metal test showing cycle-by-cycle information:\n"
" %s +verbose $RISCV/riscv64-unknown-elf/share/riscv-tests/isa/rv64ui-p-add 2>&1 | spike-dasm\n"
#if VM_TRACE
" - run a bare metal test to generate a VCD waveform:\n"
" %s -v rv64ui-p-add.vcd $RISCV/riscv64-unknown-elf/share/riscv-tests/isa/rv64ui-p-add\n"
#endif
" - run an ELF (you wrote, called 'hello') using the proxy kernel:\n"
" %s pk hello\n",
program_name, program_name, program_name
#if VM_TRACE
, program_name
#endif
);
}
int main(int argc, char** argv)
{
unsigned random_seed = (unsigned)time(NULL) ^ (unsigned)getpid();
uint64_t max_cycles = -1;
int ret = 0;
bool print_cycles = false;
// Port numbers are 16 bit unsigned integers.
uint16_t rbb_port = 0;
#if VM_TRACE
const char* vcdfile_name = NULL;
FILE * vcdfile = NULL;
uint64_t start = 0;
#endif
int verilog_plusargs_legal = 1;
int verilated_argc = 1;
char** verilated_argv = new char*[argc];
verilated_argv[0] = argv[0];
opterr = 1;
while (1) {
static struct option long_options[] = {
{"cycle-count", no_argument, 0, 'c' },
{"help", no_argument, 0, 'h' },
{"max-cycles", required_argument, 0, 'm' },
{"seed", required_argument, 0, 's' },
{"rbb-port", required_argument, 0, 'r' },
{"verbose", no_argument, 0, 'V' },
{"permissive", no_argument, 0, 'p' },
{"permissive-off", no_argument, 0, 'o' },
#if VM_TRACE
{"vcd", required_argument, 0, 'v' },
{"dump-start", required_argument, 0, 'x' },
#endif
HTIF_LONG_OPTIONS
};
int option_index = 0;
#if VM_TRACE
int c = getopt_long(argc, argv, "-chm:s:r:v:Vx:po", long_options, &option_index);
#else
int c = getopt_long(argc, argv, "-chm:s:r:Vpo", long_options, &option_index);
#endif
if (c == -1) break;
retry:
switch (c) {
// Process long and short EMULATOR options
case '?': usage(argv[0]); return 1;
case 'c': print_cycles = true; break;
case 'h': usage(argv[0]); return 0;
case 'm': max_cycles = atoll(optarg); break;
case 's': random_seed = atoi(optarg); break;
case 'r': rbb_port = atoi(optarg); break;
case 'V': verbose = true; break;
case 'p': opterr = 0; break;
case 'o': opterr = 1; break;
#if VM_TRACE
case 'v': {
vcdfile_name = optarg;
vcdfile = strcmp(optarg, "-") == 0 ? stdout : fopen(optarg, "w");
if (!vcdfile) {
std::cerr << "Unable to open " << optarg << " for VCD write\n";
return 1;
}
break;
}
case 'x': start = atoll(optarg); break;
#endif
// Process legacy '+' EMULATOR arguments by replacing them with
// their getopt equivalents
case 1: {
std::string arg = optarg;
if (arg.substr(0, 1) != "+") {
optind--;
goto done_processing;
}
if (arg == "+verbose")
c = 'V';
else if (arg.substr(0, 12) == "+max-cycles=") {
c = 'm';
optarg = optarg+12;
}
#if VM_TRACE
else if (arg.substr(0, 12) == "+dump-start=") {
c = 'x';
optarg = optarg+12;
}
#endif
else if (arg.substr(0, 12) == "+cycle-count")
c = 'c';
else if (arg == "+permissive")
{
c = 'p';
verilated_argv[verilated_argc++] = optarg;
}
else if (arg == "+permissive-off")
{
c = 'o';
verilated_argv[verilated_argc++] = optarg;
}
// If we don't find a legacy '+' EMULATOR argument, it still could be
// a VERILOG_PLUSARG and not an error.
else if (verilog_plusargs_legal) {
const char ** plusarg = &verilog_plusargs[0];
int legal_verilog_plusarg = 0;
while (*plusarg && (legal_verilog_plusarg == 0)){
if (arg.substr(1, strlen(*plusarg)) == *plusarg) {
legal_verilog_plusarg = 1;
}
plusarg ++;
}
if (!legal_verilog_plusarg) {
verilog_plusargs_legal = 0;
} else {
c = 'P';
}
goto retry;
}
// If we STILL don't find a legacy '+' argument, it still could be
// an HTIF (HOST) argument and not an error. If this is the case, then
// we're done processing EMULATOR and VERILOG arguments.
else {
static struct option htif_long_options [] = { HTIF_LONG_OPTIONS };
struct option * htif_option = &htif_long_options[0];
while (htif_option->name) {
if (arg.substr(1, strlen(htif_option->name)) == htif_option->name) {
optind--;
goto done_processing;
}
htif_option++;
}
if(opterr) {
std::cerr << argv[0] << ": invalid plus-arg (Verilog or HTIF) \""
<< arg << "\"\n";
c = '?';
} else {
c = 'P';
}
}
goto retry;
}
case 'P': // Verilog PlusArg, add to the argument list for verilator environment
verilated_argv[verilated_argc++] = optarg;
break;
// Realize that we've hit HTIF (HOST) arguments or error out
default:
if (c >= HTIF_LONG_OPTIONS_OPTIND) {
optind--;
goto done_processing;
}
c = '?';
goto retry;
}
}
done_processing:
if (optind == argc) {
std::cerr << "No binary specified for emulator\n";
usage(argv[0]);
return 1;
}
// Copy remaining HTIF arguments (if any) and the binary file name into the verilator argument stack
while (optind < argc) verilated_argv[verilated_argc++] = argv[optind++];
if (verbose)
fprintf(stderr, "using random seed %u\n", random_seed);
srand(random_seed);
srand48(random_seed);
Verilated::randReset(2);
Verilated::commandArgs(verilated_argc, verilated_argv);
TEST_HARNESS *tile = new TEST_HARNESS;
#if VM_TRACE
Verilated::traceEverOn(true); // Verilator must compute traced signals
#if CY_FST_TRACE
std::unique_ptr<VerilatedFstC> tfp(new VerilatedFstC);
#else
std::unique_ptr<VerilatedVcdFILE> vcdfd(new VerilatedVcdFILE(vcdfile));
std::unique_ptr<VerilatedVcdC> tfp(new VerilatedVcdC(vcdfd.get()));
#endif // CY_FST_TRACE
if (vcdfile_name) {
tile->trace(tfp.get(), 99); // Trace 99 levels of hierarchy
tfp->open(vcdfile_name);
}
#endif // VM_TRACE
// RocketChip currently only supports RBB port 0, so this needs to stay here
jtag = new remote_bitbang_t(rbb_port);
signal(SIGTERM, handle_sigterm);
bool dump;
// start reset off low so a rising edge triggers async reset
tile->reset = 0;
tile->clock = 0;
tile->eval();
// reset for several cycles to handle pipelined reset
for (int i = 0; i < 100; i++) {
tile->reset = 1;
tile->clock = 0;
tile->eval();
#if VM_TRACE
dump = tfp && trace_count >= start;
if (dump)
tfp->dump(static_cast<vluint64_t>(trace_count * 2));
#endif
tile->clock = 1;
tile->eval();
#if VM_TRACE
if (dump)
tfp->dump(static_cast<vluint64_t>(trace_count * 2 + 1));
#endif
trace_count ++;
}
tile->reset = 0;
done_reset = true;
do {
tile->clock = 0;
tile->eval();
#if VM_TRACE
dump = tfp && trace_count >= start;
if (dump)
tfp->dump(static_cast<vluint64_t>(trace_count * 2));
#endif
tile->clock = 1;
tile->eval();
#if VM_TRACE
if (dump)
tfp->dump(static_cast<vluint64_t>(trace_count * 2 + 1));
#endif
trace_count++;
}
// for verilator multithreading. need to do 1 loop before checking if
// tsi exists, since tsi is created by verilated thread on the first
// serial_tick.
while ((!dtm || !dtm->done()) &&
(!jtag || !jtag->done()) &&
(!tsi || !tsi->done()) &&
!tile->io_success && trace_count < max_cycles);
#if VM_TRACE
if (tfp)
tfp->close();
if (vcdfile)
fclose(vcdfile);
#endif
if (dtm && dtm->exit_code())
{
fprintf(stderr, "*** FAILED *** via dtm (code = %d, seed %d) after %ld cycles\n", dtm->exit_code(), random_seed, trace_count);
ret = dtm->exit_code();
}
else if (tsi && tsi->exit_code())
{
fprintf(stderr, "*** FAILED *** (code = %d, seed %d) after %ld cycles\n", tsi->exit_code(), random_seed, trace_count);
ret = tsi->exit_code();
}
else if (jtag && jtag->exit_code())
{
fprintf(stderr, "*** FAILED *** via jtag (code = %d, seed %d) after %ld cycles\n", jtag->exit_code(), random_seed, trace_count);
ret = jtag->exit_code();
}
else if (trace_count == max_cycles)
{
fprintf(stderr, "*** FAILED *** via trace_count (timeout, seed %d) after %ld cycles\n", random_seed, trace_count);
ret = 2;
}
else if (verbose || print_cycles)
{
fprintf(stderr, "*** PASSED *** Completed after %ld cycles\n", trace_count);
}
if (dtm) delete dtm;
if (tsi) delete tsi;
if (jtag) delete jtag;
if (tile) delete tile;
if (verilated_argv) delete[] verilated_argv;
return ret;
}

14
sims/common-sim-flags.mk
View File

@@ -33,3 +33,17 @@ SIM_LDFLAGS = \
-lfesvr \
-ldramsim \
$(EXTRA_SIM_LDFLAGS)
CLOCK_PERIOD ?= 1.0
RESET_DELAY ?= 777.7
SIM_PREPROC_DEFINES = \
+define+CLOCK_PERIOD=$(CLOCK_PERIOD) \
+define+RESET_DELAY=$(RESET_DELAY) \
+define+PRINTF_COND=$(TB).printf_cond \
+define+STOP_COND=!$(TB).reset \
+define+MODEL=$(MODEL) \
+define+RANDOMIZE_MEM_INIT \
+define+RANDOMIZE_REG_INIT \
+define+RANDOMIZE_GARBAGE_ASSIGN \
+define+RANDOMIZE_INVALID_ASSIGN

2
sims/firesim

Submodule sims/firesim updated: 3ae68ec307...0c1a7a6339

4
sims/vcs/Makefile
View File

@@ -25,7 +25,7 @@ sim_prefix = simv
sim = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)
sim_debug = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)-debug
include $(base_dir)/vcs.mk
include $(sim_dir)/vcs.mk
.PHONY: default debug
default: $(sim)
@@ -56,7 +56,7 @@ include $(base_dir)/common.mk
#########################################################################################
VCS = vcs -full64
VCS_OPTS = $(VCS_CC_OPTS) $(VCS_NONCC_OPTS) $(PREPROC_DEFINES)
VCS_OPTS = $(VCS_CC_OPTS) $(VCS_NONCC_OPTS) $(SIM_PREPROC_DEFINES) $(VCS_PREPROC_DEFINES)
#########################################################################################
# vcs build paths

13
vcs.mk → sims/vcs/vcs.mk
View File

@@ -53,17 +53,8 @@ VCS_NONCC_OPTS = \
-debug_pp \
+incdir+$(GEN_COLLATERAL_DIR)
PREPROC_DEFINES = \
+define+VCS \
+define+CLOCK_PERIOD=$(CLOCK_PERIOD) \
+define+RESET_DELAY=$(RESET_DELAY) \
+define+PRINTF_COND=$(TB).printf_cond \
+define+STOP_COND=!$(TB).reset \
+define+MODEL=$(MODEL) \
+define+RANDOMIZE_MEM_INIT \
+define+RANDOMIZE_REG_INIT \
+define+RANDOMIZE_GARBAGE_ASSIGN \
+define+RANDOMIZE_INVALID_ASSIGN
VCS_PREPROC_DEFINES = \
+define+VCS
ifndef USE_VPD
PREPROC_DEFINES += +define+FSDB

66
sims/verilator/Makefile
View File

@@ -28,8 +28,6 @@ sim_prefix = simulator
sim = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)
sim_debug = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)-debug
WAVEFORM_FLAG=-v$(sim_out_name).vcd
include $(base_dir)/sims/common-sim-flags.mk
# If verilator seed unspecified, verilator uses srand as random seed
@@ -47,24 +45,7 @@ debug: $(sim_debug)
# simulaton requirements
#########################################################################################
SIM_FILE_REQS += \
$(CHIPYARD_RSRCS_DIR)/csrc/emulator.cc \
$(ROCKETCHIP_RSRCS_DIR)/csrc/verilator.h \
# the following files are needed for emulator.cc to compile (even if they aren't part of the RTL build)
SIM_FILE_REQS += \
$(TESTCHIP_RSRCS_DIR)/testchipip/csrc/SimSerial.cc \
$(TESTCHIP_RSRCS_DIR)/testchipip/csrc/testchip_tsi.cc \
$(TESTCHIP_RSRCS_DIR)/testchipip/csrc/testchip_tsi.h \
$(TESTCHIP_RSRCS_DIR)/testchipip/csrc/SimDRAM.cc \
$(TESTCHIP_RSRCS_DIR)/testchipip/csrc/mm.h \
$(TESTCHIP_RSRCS_DIR)/testchipip/csrc/mm.cc \
$(TESTCHIP_RSRCS_DIR)/testchipip/csrc/mm_dramsim2.h \
$(TESTCHIP_RSRCS_DIR)/testchipip/csrc/mm_dramsim2.cc \
$(TESTCHIP_RSRCS_DIR)/testchipip/csrc/testchip_dtm.cc \
$(TESTCHIP_RSRCS_DIR)/testchipip/csrc/testchip_dtm.h \
$(ROCKETCHIP_RSRCS_DIR)/csrc/SimJTAG.cc \
$(ROCKETCHIP_RSRCS_DIR)/csrc/remote_bitbang.h \
$(ROCKETCHIP_RSRCS_DIR)/csrc/remote_bitbang.cc
$(ROCKETCHIP_RSRCS_DIR)/vsrc/TestDriver.v
# copy files and add -FI for *.h files in *.f
$(sim_files): $(SIM_FILE_REQS) $(ALL_MODS_FILELIST) | $(GEN_COLLATERAL_DIR)
@@ -88,12 +69,15 @@ HELP_COMPILATION_VARIABLES += \
" 'all' if full verilator runtime profiling" \
" 'threads' if runtime thread profiling only" \
" VERILATOR_THREADS = how many threads the simulator will use (default 1)" \
" VERILATOR_FST_MODE = enable FST waveform instead of VCD. use with debug build"
" USE_FST = set to '1' to build Verilator simulator to emit FST instead of VCD."
HELP_SIMULATION_VARIABLES += \
" USE_FST = set to '1' to run Verilator simulator emitting FST instead of VCD."
#########################################################################################
# verilator/cxx binary and flags
#########################################################################################
VERILATOR := verilator --cc --exe
VERILATOR := verilator --main --timing --cc --exe
#----------------------------------------------------------------------------------------
# user configs
@@ -108,10 +92,12 @@ RUNTIME_PROFILING_VFLAGS := $(if $(filter $(VERILATOR_PROFILE),all),\
VERILATOR_THREADS ?= 1
RUNTIME_THREADS := --threads $(VERILATOR_THREADS) --threads-dpi all
VERILATOR_FST_MODE ?= 0
TRACING_OPTS := $(if $(filter $(VERILATOR_FST_MODE),0),\
USE_FST ?= 0
TRACING_OPTS := $(if $(filter $(USE_FST),0),\
--trace,--trace-fst --trace-threads 1)
TRACING_CFLAGS := $(if $(filter $(VERILATOR_FST_MODE),0),,-DCY_FST_TRACE)
# TODO: consider renaming +vcdfile in TestDriver.v to +waveformfile (or similar)
WAVEFORM_FLAG := +vcdfile=$(sim_out_name).$(if $(filter $(USE_FST),0),\
vcd,fst)
#----------------------------------------------------------------------------------------
# verilation configuration/optimization
@@ -154,9 +140,8 @@ TIMESCALE_OPTS := $(shell verilator --version | perl -lne 'if (/(\d.\d+)/ && $$1
# see: https://github.com/ucb-bar/riscv-mini/issues/31
MAX_WIDTH_OPTS = $(shell verilator --version | perl -lne 'if (/(\d.\d+)/ && $$1 > 4.016) { print "--max-num-width 1048576"; }')
PREPROC_DEFINES := \
+define+PRINTF_COND=\$$c\(\"verbose\",\"\&\&\"\,\"done_reset\"\) \
+define+STOP_COND=\$$c\(\"done_reset\"\)
VERILATOR_PREPROC_DEFINES = \
+define+VERILATOR
VERILATOR_NONCC_OPTS = \
$(RUNTIME_PROFILING_VFLAGS) \
@@ -166,8 +151,9 @@ VERILATOR_NONCC_OPTS = \
-Wno-fatal \
$(TIMESCALE_OPTS) \
$(MAX_WIDTH_OPTS) \
$(PREPROC_DEFINES) \
--top-module $(VLOG_MODEL) \
$(SIM_PREPROC_DEFINES) \
$(VERILATOR_PREPROC_DEFINES) \
--top-module $(TB) \
--vpi \
-f $(sim_common_files)
@@ -177,12 +163,8 @@ VERILATOR_NONCC_OPTS = \
VERILATOR_CXXFLAGS = \
$(SIM_CXXFLAGS) \
$(RUNTIME_PROFILING_CFLAGS) \
$(TRACING_CFLAGS) \
-D__STDC_FORMAT_MACROS \
-DTEST_HARNESS=V$(VLOG_MODEL) \
-DVERILATOR \
-include $(build_dir)/$(long_name).plusArgs \
-include $(GEN_COLLATERAL_DIR)/verilator.h
-include $(build_dir)/$(long_name).plusArgs
VERILATOR_LDFLAGS = $(SIM_LDFLAGS)
@@ -201,11 +183,11 @@ VERILATOR_OPTS = $(VERILATOR_CC_OPTS) $(VERILATOR_NONCC_OPTS)
model_dir = $(build_dir)/$(long_name)
model_dir_debug = $(build_dir)/$(long_name).debug
model_header = $(model_dir)/V$(VLOG_MODEL).h
model_header_debug = $(model_dir_debug)/V$(VLOG_MODEL).h
model_header = $(model_dir)/V$(TB).h
model_header_debug = $(model_dir_debug)/V$(TB).h
model_mk = $(model_dir)/V$(VLOG_MODEL).mk
model_mk_debug = $(model_dir_debug)/V$(VLOG_MODEL).mk
model_mk = $(model_dir)/V$(TB).mk
model_mk_debug = $(model_dir_debug)/V$(TB).mk
#########################################################################################
# build makefile fragment that builds the verilator sim rules
@@ -219,17 +201,17 @@ $(model_mk): $(sim_common_files) $(EXTRA_SIM_REQS)
$(model_mk_debug): $(sim_common_files) $(EXTRA_SIM_REQS)
rm -rf $(model_dir_debug)
mkdir -p $(model_dir_debug)
$(VERILATOR) $(VERILATOR_OPTS) $(EXTRA_SIM_SOURCES) -o $(sim_debug) $(TRACING_OPTS) -Mdir $(model_dir_debug) -CFLAGS "-include $(model_header_debug)"
$(VERILATOR) $(VERILATOR_OPTS) +define+DEBUG $(EXTRA_SIM_SOURCES) -o $(sim_debug) $(TRACING_OPTS) -Mdir $(model_dir_debug) -CFLAGS "-include $(model_header_debug)"
touch $@
#########################################################################################
# invoke make to make verilator sim rules
#########################################################################################
$(sim): $(model_mk) $(dramsim_lib)
$(MAKE) VM_PARALLEL_BUILDS=1 -C $(model_dir) -f V$(VLOG_MODEL).mk
$(MAKE) VM_PARALLEL_BUILDS=1 -C $(model_dir) -f V$(TB).mk
$(sim_debug): $(model_mk_debug) $(dramsim_lib)
$(MAKE) VM_PARALLEL_BUILDS=1 -C $(model_dir_debug) -f V$(VLOG_MODEL).mk
$(MAKE) VM_PARALLEL_BUILDS=1 -C $(model_dir_debug) -f V$(TB).mk
#########################################################################################
# create a verilator vpd rule

2
vlsi/Makefile
View File

@@ -134,7 +134,7 @@ $(SYN_CONF): $(VLSI_RTL)
#########################################################################################
# simulation and power input configuration
#########################################################################################
include $(base_dir)/vcs.mk
include $(base_dir)/sims/vcs/vcs.mk
SIM_FILE_REQS += \
$(ROCKETCHIP_RSRCS_DIR)/vsrc/TestDriver.v