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Merge pull request #778 from ucb-bar/jerryz123-patch-2

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Update comment on GenerateReset
This commit is contained in:
Jerry Zhao
2021-01-30 19:53:45 -08:00
committed by GitHub
parent f22051ca84 99a1c5d542
commit ec14bf0d23
1 changed files with 2 additions and 2 deletions
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generators/chipyard/src/main/scala/Clocks.scala
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@@ -17,8 +17,8 @@ import chipyard.clocking._
/** /**
* A simple reset implementation that punches out reset ports * A simple reset implementation that punches out reset ports
* for standard Module classes. Three basic reset schemes * for standard Module classes. The ChipTop reset pin is Async.
* are provided. See [[GlobalResetScheme]]. * Synchronization is performed in the ClockGroupResetSynchronizer
*/ */
object GenerateReset { object GenerateReset {
def apply(chiptop: ChipTop, clock: Clock): Reset = { def apply(chiptop: ChipTop, clock: Clock): Reset = {