Merge pull request #608 from ucb-bar/openroad
OpenROAD complete backend with nangate45
This commit is contained in:
3
vlsi/.gitignore
vendored
3
vlsi/.gitignore
vendored
@@ -3,4 +3,5 @@ __pycache__
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hammer*.log
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build
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src/test/output-*.json
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generated-src
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generated-src
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output.json
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@@ -19,25 +19,27 @@ include $(base_dir)/variables.mk
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#########################################################################################
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sim_name ?= vcs # needed for GenerateSimFiles, but is unused
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tech_name ?= asap7
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tech_dir ?= $(if $(filter $(tech_name), asap7), $(vlsi_dir)/hammer/src/hammer-vlsi/technology/$(tech_name), $(vlsi_dir)/hammer-$(tech_name)-plugin/$(tech_name))
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tech_dir ?= $(if $(filter $(tech_name),asap7 nangate45),\
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$(vlsi_dir)/hammer/src/hammer-vlsi/technology/$(tech_name), \
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$(vlsi_dir)/hammer-$(tech_name)-plugin/$(tech_name))
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SMEMS_COMP ?= $(tech_dir)/sram-compiler.json
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SMEMS_CACHE ?= $(tech_dir)/sram-cache.json
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SMEMS_HAMMER ?= $(build_dir)/$(long_name).mems.hammer.json
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ifeq ($(tech_name),asap7)
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MACROCOMPILER_MODE ?= --mode synflops
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else
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MACROCOMPILER_MODE ?= -l $(SMEMS_CACHE) -hir $(SMEMS_HAMMER)
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endif
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MACROCOMPILER_MODE ?= $(if $(filter $(tech_name),asap7),\
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--mode synflops,\
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-l $(SMEMS_CACHE) -hir $(SMEMS_HAMMER) --mode strict)
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ENV_YML ?= $(vlsi_dir)/env.yml
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INPUT_CONFS ?= example.yml
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HAMMER_EXEC ?= ./example-vlsi
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INPUT_CONFS ?= $(if $(filter $(tech_name),nangate45),\
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example-nangate45.yml,\
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example-asap7.yml)
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HAMMER_EXEC ?= example-vlsi
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VLSI_TOP ?= $(TOP)
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VLSI_HARNESS_DUT_NAME ?= dut
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VLSI_OBJ_DIR ?= $(vlsi_dir)/build
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ifneq ($(CUSTOM_VLOG), )
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OBJ_DIR ?= $(VLSI_OBJ_DIR)/custom-$(VLSI_TOP)
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ifneq ($(CUSTOM_VLOG),)
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OBJ_DIR ?= $(VLSI_OBJ_DIR)/custom-$(VLSI_TOP)
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else
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OBJ_DIR ?= $(VLSI_OBJ_DIR)/$(long_name)-$(VLSI_TOP)
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OBJ_DIR ?= $(VLSI_OBJ_DIR)/$(long_name)-$(VLSI_TOP)
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endif
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#########################################################################################
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73
vlsi/example-nangate45.yml
Normal file
73
vlsi/example-nangate45.yml
Normal file
@@ -0,0 +1,73 @@
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#----------------------
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# Technology Setup
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#----------------------
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vlsi.core.technology: nangate45
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# the nangate45.tech.json can't reference the $OPENROAD environment variable,
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# so we need to set the install dir here.
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# TODO: figure out how to remove this, or override it within OpenROADTool
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technology.nangate45.install_dir: "/k/work/OpenROAD-flow/tools/OpenROAD"
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vlsi.core.max_threads: 12
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#----------------------
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# General Hammer Inputs
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#----------------------
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# Hammer will auto-generate a CPF for simple power designs;
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# see hammer/src/hammer-vlsi/defaults.yml for more info
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vlsi.inputs.power_spec_mode: "auto"
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vlsi.inputs.power_spec_type: "cpf"
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# Specify clock signals
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vlsi.inputs.clocks: [
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{name: "clock", period: "5ns", uncertainty: "0.5ns"}
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]
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# Generate Make include to aid in flow
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vlsi.core.build_system: make
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#----------------------
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# Placement Constraints
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#----------------------
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# For nangate45, size should be multiple of (0.19,1.4) placement grid
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vlsi.inputs.placement_constraints:
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- path: "ChipTop"
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type: toplevel
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x: 0
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y: 0
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width: 3334.72
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height: 3798.2
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margins:
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left: 0
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right: 0
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top: 0
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bottom: 0
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# SRAM Compiler compiler options
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vlsi.core.sram_generator_tool: "sram_compiler"
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## You should specify a location for the SRAM generator in the tech plugin
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vlsi.core.sram_generator_tool_path: [
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"hammer/src/hammer-vlsi/technology/nangate45"]
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vlsi.core.sram_generator_tool_path_meta: "append"
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#----------------------
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# Tool options. Replace with your tool plugin of choice.
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#----------------------
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# OpenROAD-yosys options
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vlsi.core.synthesis_tool: "yosys"
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vlsi.core.synthesis_tool_path: ["hammer/src/hammer-vlsi/synthesis/yosys"]
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vlsi.core.synthesis_tool_path_meta: "append"
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# OpenROAD-par options
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vlsi.core.par_tool: "openroad"
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vlsi.core.par_tool_path: ["hammer/src/hammer-vlsi/par"]
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vlsi.core.par_tool_path_meta: "append"
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# OpenROAD-drc options (no lvs)
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vlsi.core.drc_tool: "openroad"
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vlsi.core.drc_tool_path: ["hammer/src/hammer-vlsi/drc"]
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vlsi.core.drc_tool_path_meta: "append"
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@@ -1,4 +1,8 @@
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#!/usr/bin/env python3
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#
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# NOTE: this ExampleDriver works for asap7 and nangate45. the custom hooks are
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# only used for asap7 though.
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import os
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import hammer_vlsi
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@@ -7,21 +11,24 @@ from hammer_vlsi import CLIDriver, HammerToolHookAction
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from typing import Dict, Callable, Optional, List
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def example_place_tap_cells(x: hammer_vlsi.HammerTool) -> bool:
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x.append('''
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if x.get_setting("vlsi.core.technology") == "asap7":
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x.append('''
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# TODO
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# Place custom TCL here
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''')
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return True
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def example_add_fillers(x: hammer_vlsi.HammerTool) -> bool:
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x.append('''
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if x.get_setting("vlsi.core.technology") == "asap7":
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x.append('''
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# TODO
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# Place custom TCL here
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''')
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return True
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def example_tool_settings(x: hammer_vlsi.HammerTool) -> bool:
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x.append('''
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if x.get_setting("vlsi.core.technology") == "asap7":
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x.append('''
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# TODO
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# Place custom TCL here
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set_db route_design_bottom_routing_layer 2
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@@ -34,7 +41,8 @@ def scale_final_gds(x: hammer_vlsi.HammerTool) -> bool:
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Scale the final GDS by a factor of 4
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hammer/src/hammer-vlsi/technology/asap7/__init__.py implements scale_gds_script
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"""
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x.append('''
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if x.get_setting("vlsi.core.technology") == "asap7":
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x.append('''
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# Write script out to a temporary file and execute it
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set fp [open "{script_file}" "w"]
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puts -nonewline $fp "{script_text}"
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Submodule vlsi/hammer updated: bd94e1ed7a...528e745c54
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