From 5acf583d88088f3d36f9c2ec7fc903ac1c095749 Mon Sep 17 00:00:00 2001 From: Sam Steffl Date: Thu, 18 Jun 2020 13:55:33 -0700 Subject: [PATCH 1/6] OpenROAD synthesis complete with fake rams on nangate45 --- vlsi/.gitignore | 3 +- vlsi/Makefile | 20 +++-- vlsi/example-nangate45.yml | 144 ++++++++++++++++++++++++++++++++++++ vlsi/example-vlsi-nangate45 | 29 ++++++++ vlsi/hammer | 2 +- 5 files changed, 188 insertions(+), 10 deletions(-) create mode 100644 vlsi/example-nangate45.yml create mode 100755 vlsi/example-vlsi-nangate45 diff --git a/vlsi/.gitignore b/vlsi/.gitignore index 4cbcfe8f..abe3347f 100644 --- a/vlsi/.gitignore +++ b/vlsi/.gitignore @@ -3,4 +3,5 @@ __pycache__ hammer*.log build src/test/output-*.json -generated-src \ No newline at end of file +generated-src +output.json diff --git a/vlsi/Makefile b/vlsi/Makefile index 42af7ba2..912eecdd 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -19,18 +19,22 @@ include $(base_dir)/variables.mk ######################################################################################### sim_name ?= vcs # needed for GenerateSimFiles, but is unused tech_name ?= asap7 -tech_dir ?= $(if $(filter $(tech_name), asap7), $(vlsi_dir)/hammer/src/hammer-vlsi/technology/$(tech_name), $(vlsi_dir)/hammer-$(tech_name)-plugin/$(tech_name)) +tech_dir ?= $(if $(filter $(tech_name),asap7 nangate45),\ + $(vlsi_dir)/hammer/src/hammer-vlsi/technology/$(tech_name), \ + $(vlsi_dir)/hammer-$(tech_name)-plugin/$(tech_name)) SMEMS_COMP ?= $(tech_dir)/sram-compiler.json SMEMS_CACHE ?= $(tech_dir)/sram-cache.json SMEMS_HAMMER ?= $(build_dir)/$(long_name).mems.hammer.json -ifeq ($(tech_name),asap7) - MACROCOMPILER_MODE ?= --mode synflops -else - MACROCOMPILER_MODE ?= -l $(SMEMS_CACHE) -hir $(SMEMS_HAMMER) -endif +MACROCOMPILER_MODE ?= $(if $(filter $(tech_name),asap7),\ + --mode synflops,\ + -l $(SMEMS_CACHE) -hir $(SMEMS_HAMMER) --mode strict) ENV_YML ?= $(vlsi_dir)/env.yml -INPUT_CONFS ?= example.yml -HAMMER_EXEC ?= ./example-vlsi +INPUT_CONFS ?= $(if $(filter $(tech_name),nangate45),\ + example-nangate45.yml,\ + example.yml) +HAMMER_EXEC ?= $(if $(filter $(tech_name),nangate45),\ + example-vlsi-nangate45,\ + example-vlsi) VLSI_TOP ?= $(TOP) VLSI_HARNESS_DUT_NAME ?= dut VLSI_OBJ_DIR ?= $(vlsi_dir)/build diff --git a/vlsi/example-nangate45.yml b/vlsi/example-nangate45.yml new file mode 100644 index 00000000..de4d912f --- /dev/null +++ b/vlsi/example-nangate45.yml @@ -0,0 +1,144 @@ +# Technology Setup +# Technology used is nanagate45 +vlsi.core.technology: nangate45 +# Specify dir with ASAP7 tarball +technology.nangate45.install_dir: "/k/work/OpenROAD-flow/tools/OpenROAD" + +vlsi.core.max_threads: 12 + +# General Hammer Inputs + +# Hammer will auto-generate a CPF for simple power designs; see hammer/src/hammer-vlsi/defaults.yml for more info +vlsi.inputs.power_spec_mode: "auto" +vlsi.inputs.power_spec_type: "cpf" + +# Specify clock signals +vlsi.inputs.clocks: [ + {name: "clock", period: "5ns", uncertainty: "0.5ns"} +] + +# Generate Make include to aid in flow +vlsi.core.build_system: make + +# Power Straps +#par.power_straps_mode: generate +#par.generate_power_straps_method: by_tracks +#par.blockage_spacing: 2.0 +#par.generate_power_straps_options: +# by_tracks: +# strap_layers: +# - metal3 +# - metal4 +# - metal5 +# - metal6 +# - metal7 +# - metal8 +# pin_layers: +# - metal7 +# - metal8 +# track_width: 7 # minimum allowed for M2 & M3 +# track_spacing: 0 +# track_spacing_M3: 1 # to avoid M2 shorts at higher density +# track_start: 10 +# power_utilization: 0.05 +# power_utilization_M8: 1.0 +# power_utilization_M9: 1.0 + +# Placement Constraints +# For ASAP7, all numbers must be 4x larger than final GDS +vlsi.inputs.placement_constraints: + - path: "ChipTop" + type: toplevel + x: 0 + y: 0 + width: 1387.38 + height: 1199.1 + margins: + left: 0 + right: 0 + top: 0 + bottom: 0 +# - path: "Sha3AccelwBB/dco" +# type: hardmacro +# x: 108 +# y: 108 +# width: 128 +# height: 128 +# orientation: r0 +# top_layer: M9 +# - path: "Sha3AccelwBB/place_obs_bottom" +# type: obstruction +# obs_types: ["place"] +# x: 0 +# y: 0 +# width: 300 +# height: 1.08 # 1 core site tall, necessary to avoid shorts + +# Pin placement constraints +#vlsi.inputs.pin_mode: generated +#vlsi.inputs.pin.generate_mode: semi_auto +#vlsi.inputs.pin.assignments: [ +# {pins: "*", layers: ["metal7", "metal8"]} +#] + +# Paths to extra libraries +#vlsi.technology.extra_libraries_meta: ["append", "deepsubst"] +#vlsi.technology.extra_libraries: +# - library: +# nldm liberty file_deepsubst_meta: "local" +# nldm liberty file: "extra_libraries/example/ExampleDCO_PVT_0P63V_100C.lib" +# lef file_deepsubst_meta: "local" +# lef file: "extra_libraries/example/ExampleDCO.lef" +# gds file_deepsubst_meta: "local" +# gds file: "extra_libraries/example/ExampleDCO.gds" +# corner: +# nmos: "slow" +# pmos: "slow" +# temperature: "100 C" +# supplies: +# VDD: "0.63 V" +# GND: "0 V" +# - library: +# nldm liberty file_deepsubst_meta: "local" +# nldm liberty file: "extra_libraries/example/ExampleDCO_PVT_0P77V_0C.lib" +# lef file_deepsubst_meta: "local" +# lef file: "extra_libraries/example/ExampleDCO.lef" +# gds file_deepsubst_meta: "local" +# gds file: "extra_libraries/example/ExampleDCO.gds" +# corner: +# nmos: "fast" +# pmos: "fast" +# temperature: "0 C" +# supplies: +# VDD: "0.77 V" +# GND: "0 V" + +# Because the DCO is a dummy layout, we treat it as a physical-only cell +#par.inputs.physical_only_cells_mode: append +#par.inputs.physical_only_cells_list: +# - ExampleDCO + +# SRAM Compiler compiler options +vlsi.core.sram_generator_tool: "sram_compiler" +## You should specify a location for the SRAM generator in the tech plugin +vlsi.core.sram_generator_tool_path: ["hammer/src/hammer-vlsi/technology/nangate45"] +vlsi.core.sram_generator_tool_path_meta: "append" + +# Tool options. Replace with your tool plugin of choice. +# yosys options +vlsi.core.synthesis_tool: "yosys" +vlsi.core.synthesis_tool_path: ["hammer/src/hammer-vlsi/synthesis/yosys"] +vlsi.core.synthesis_tool_path_meta: "append" + +# Innovus options +#vlsi.core.par_tool: "innovus" +#vlsi.core.par_tool_path: ["hammer-cadence-plugins/par"] +#vlsi.core.par_tool_path_meta: "append" +#par.innovus.version: "181" +#par.innovus.design_flow_effort: "standard" +#par.inputs.gds_merge: true +## Calibre options +#vlsi.core.drc_tool: "calibre" +#vlsi.core.drc_tool_path: ["hammer-mentor-plugins/drc"] +#vlsi.core.lvs_tool: "calibre" +#vlsi.core.lvs_tool_path: ["hammer-mentor-plugins/lvs"] diff --git a/vlsi/example-vlsi-nangate45 b/vlsi/example-vlsi-nangate45 new file mode 100755 index 00000000..39b9a493 --- /dev/null +++ b/vlsi/example-vlsi-nangate45 @@ -0,0 +1,29 @@ +#!/usr/bin/env python3 +import os + +import hammer_vlsi +from hammer_vlsi import CLIDriver, HammerToolHookAction + +from typing import Dict, Callable, Optional, List + +def example_place_tap_cells(x: hammer_vlsi.HammerTool) -> bool: + x.append("") + return True + +def example_add_fillers(x: hammer_vlsi.HammerTool) -> bool: + x.append("") + return True + +class ExampleDriver(CLIDriver): + def get_extra_par_hooks(self) -> List[HammerToolHookAction]: + extra_hooks = [ + # make_pre_insertion_hook will execute the custom hook before the specified step + hammer_vlsi.HammerTool.make_pre_insertion_hook("route_design", example_add_fillers), + + # make_replacement_hook will replace the specified step with a custom hook + hammer_vlsi.HammerTool.make_replacement_hook("place_tap_cells", example_place_tap_cells), + ] + return extra_hooks + +if __name__ == '__main__': + ExampleDriver().main() diff --git a/vlsi/hammer b/vlsi/hammer index bd94e1ed..657feaed 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit bd94e1ed7a5f70fe85ea833cb89836efefe53dc7 +Subproject commit 657feaed58014f4ef5b76acaa1e0cc559f182bda From 254304428bfcce91dd9c396c9fdcb7c7a12c135f Mon Sep 17 00:00:00 2001 From: Sam Steffl Date: Fri, 19 Jun 2020 12:03:59 -0700 Subject: [PATCH 2/6] refactored openroad stuff into OpenROADTool base class. fixed PR suggestions --- vlsi/Makefile | 22 +++++++++++----------- vlsi/example-nangate45.yml | 3 ++- vlsi/hammer | 2 +- 3 files changed, 14 insertions(+), 13 deletions(-) diff --git a/vlsi/Makefile b/vlsi/Makefile index 912eecdd..e969ba14 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -20,28 +20,28 @@ include $(base_dir)/variables.mk sim_name ?= vcs # needed for GenerateSimFiles, but is unused tech_name ?= asap7 tech_dir ?= $(if $(filter $(tech_name),asap7 nangate45),\ - $(vlsi_dir)/hammer/src/hammer-vlsi/technology/$(tech_name), \ - $(vlsi_dir)/hammer-$(tech_name)-plugin/$(tech_name)) + $(vlsi_dir)/hammer/src/hammer-vlsi/technology/$(tech_name), \ + $(vlsi_dir)/hammer-$(tech_name)-plugin/$(tech_name)) SMEMS_COMP ?= $(tech_dir)/sram-compiler.json SMEMS_CACHE ?= $(tech_dir)/sram-cache.json SMEMS_HAMMER ?= $(build_dir)/$(long_name).mems.hammer.json MACROCOMPILER_MODE ?= $(if $(filter $(tech_name),asap7),\ - --mode synflops,\ - -l $(SMEMS_CACHE) -hir $(SMEMS_HAMMER) --mode strict) + --mode synflops,\ + -l $(SMEMS_CACHE) -hir $(SMEMS_HAMMER) --mode strict) ENV_YML ?= $(vlsi_dir)/env.yml INPUT_CONFS ?= $(if $(filter $(tech_name),nangate45),\ - example-nangate45.yml,\ - example.yml) + example-nangate45.yml,\ + example.yml) HAMMER_EXEC ?= $(if $(filter $(tech_name),nangate45),\ - example-vlsi-nangate45,\ - example-vlsi) + example-vlsi-nangate45,\ + example-vlsi) VLSI_TOP ?= $(TOP) VLSI_HARNESS_DUT_NAME ?= dut VLSI_OBJ_DIR ?= $(vlsi_dir)/build -ifneq ($(CUSTOM_VLOG), ) - OBJ_DIR ?= $(VLSI_OBJ_DIR)/custom-$(VLSI_TOP) +ifneq ($(CUSTOM_VLOG),) + OBJ_DIR ?= $(VLSI_OBJ_DIR)/custom-$(VLSI_TOP) else - OBJ_DIR ?= $(VLSI_OBJ_DIR)/$(long_name)-$(VLSI_TOP) + OBJ_DIR ?= $(VLSI_OBJ_DIR)/$(long_name)-$(VLSI_TOP) endif ######################################################################################### diff --git a/vlsi/example-nangate45.yml b/vlsi/example-nangate45.yml index de4d912f..b4c1288a 100644 --- a/vlsi/example-nangate45.yml +++ b/vlsi/example-nangate45.yml @@ -1,7 +1,8 @@ # Technology Setup -# Technology used is nanagate45 vlsi.core.technology: nangate45 + # Specify dir with ASAP7 tarball +# TODO: figure out how to remove this, or override it within OpenROADTool technology.nangate45.install_dir: "/k/work/OpenROAD-flow/tools/OpenROAD" vlsi.core.max_threads: 12 diff --git a/vlsi/hammer b/vlsi/hammer index 657feaed..c5a3cdf8 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit 657feaed58014f4ef5b76acaa1e0cc559f182bda +Subproject commit c5a3cdf84987a46c91f3f879541060757bf225fb From c617c4db24d6a58deb45399d1c655c57390170e6 Mon Sep 17 00:00:00 2001 From: Sam Steffl Date: Sat, 20 Jun 2020 13:15:56 -0700 Subject: [PATCH 3/6] openroad floorplanning broken at TritonMacroPlace. needs debugging --- vlsi/Makefile | 6 +- vlsi/{example.yml => example-asap7.yml} | 0 vlsi/example-nangate45.yml | 129 +++++------------------- vlsi/example-vlsi | 16 ++- vlsi/example-vlsi-nangate45 | 29 ------ vlsi/hammer | 2 +- 6 files changed, 43 insertions(+), 139 deletions(-) rename vlsi/{example.yml => example-asap7.yml} (100%) delete mode 100755 vlsi/example-vlsi-nangate45 diff --git a/vlsi/Makefile b/vlsi/Makefile index e969ba14..a9e3d3a5 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -31,10 +31,8 @@ MACROCOMPILER_MODE ?= $(if $(filter $(tech_name),asap7),\ ENV_YML ?= $(vlsi_dir)/env.yml INPUT_CONFS ?= $(if $(filter $(tech_name),nangate45),\ example-nangate45.yml,\ - example.yml) -HAMMER_EXEC ?= $(if $(filter $(tech_name),nangate45),\ - example-vlsi-nangate45,\ - example-vlsi) + example-asap7.yml) +HAMMER_EXEC ?= example-vlsi VLSI_TOP ?= $(TOP) VLSI_HARNESS_DUT_NAME ?= dut VLSI_OBJ_DIR ?= $(vlsi_dir)/build diff --git a/vlsi/example.yml b/vlsi/example-asap7.yml similarity index 100% rename from vlsi/example.yml rename to vlsi/example-asap7.yml diff --git a/vlsi/example-nangate45.yml b/vlsi/example-nangate45.yml index b4c1288a..7d43d068 100644 --- a/vlsi/example-nangate45.yml +++ b/vlsi/example-nangate45.yml @@ -1,15 +1,22 @@ +#---------------------- # Technology Setup +#---------------------- + vlsi.core.technology: nangate45 -# Specify dir with ASAP7 tarball +# the nangate45.tech.json can't reference the $OPENROAD environment variable, +# so we need to set the install dir here. # TODO: figure out how to remove this, or override it within OpenROADTool technology.nangate45.install_dir: "/k/work/OpenROAD-flow/tools/OpenROAD" vlsi.core.max_threads: 12 +#---------------------- # General Hammer Inputs +#---------------------- -# Hammer will auto-generate a CPF for simple power designs; see hammer/src/hammer-vlsi/defaults.yml for more info +# Hammer will auto-generate a CPF for simple power designs; +# see hammer/src/hammer-vlsi/defaults.yml for more info vlsi.inputs.power_spec_mode: "auto" vlsi.inputs.power_spec_type: "cpf" @@ -21,125 +28,45 @@ vlsi.inputs.clocks: [ # Generate Make include to aid in flow vlsi.core.build_system: make -# Power Straps -#par.power_straps_mode: generate -#par.generate_power_straps_method: by_tracks -#par.blockage_spacing: 2.0 -#par.generate_power_straps_options: -# by_tracks: -# strap_layers: -# - metal3 -# - metal4 -# - metal5 -# - metal6 -# - metal7 -# - metal8 -# pin_layers: -# - metal7 -# - metal8 -# track_width: 7 # minimum allowed for M2 & M3 -# track_spacing: 0 -# track_spacing_M3: 1 # to avoid M2 shorts at higher density -# track_start: 10 -# power_utilization: 0.05 -# power_utilization_M8: 1.0 -# power_utilization_M9: 1.0 - +#---------------------- # Placement Constraints -# For ASAP7, all numbers must be 4x larger than final GDS +#---------------------- + +# For nangate45, size should be multiple of (0.19,1.4) placement grid vlsi.inputs.placement_constraints: - path: "ChipTop" type: toplevel x: 0 y: 0 - width: 1387.38 - height: 1199.1 + width: 3334.72 + height: 2398.2 margins: left: 0 right: 0 top: 0 bottom: 0 -# - path: "Sha3AccelwBB/dco" -# type: hardmacro -# x: 108 -# y: 108 -# width: 128 -# height: 128 -# orientation: r0 -# top_layer: M9 -# - path: "Sha3AccelwBB/place_obs_bottom" -# type: obstruction -# obs_types: ["place"] -# x: 0 -# y: 0 -# width: 300 -# height: 1.08 # 1 core site tall, necessary to avoid shorts - -# Pin placement constraints -#vlsi.inputs.pin_mode: generated -#vlsi.inputs.pin.generate_mode: semi_auto -#vlsi.inputs.pin.assignments: [ -# {pins: "*", layers: ["metal7", "metal8"]} -#] - -# Paths to extra libraries -#vlsi.technology.extra_libraries_meta: ["append", "deepsubst"] -#vlsi.technology.extra_libraries: -# - library: -# nldm liberty file_deepsubst_meta: "local" -# nldm liberty file: "extra_libraries/example/ExampleDCO_PVT_0P63V_100C.lib" -# lef file_deepsubst_meta: "local" -# lef file: "extra_libraries/example/ExampleDCO.lef" -# gds file_deepsubst_meta: "local" -# gds file: "extra_libraries/example/ExampleDCO.gds" -# corner: -# nmos: "slow" -# pmos: "slow" -# temperature: "100 C" -# supplies: -# VDD: "0.63 V" -# GND: "0 V" -# - library: -# nldm liberty file_deepsubst_meta: "local" -# nldm liberty file: "extra_libraries/example/ExampleDCO_PVT_0P77V_0C.lib" -# lef file_deepsubst_meta: "local" -# lef file: "extra_libraries/example/ExampleDCO.lef" -# gds file_deepsubst_meta: "local" -# gds file: "extra_libraries/example/ExampleDCO.gds" -# corner: -# nmos: "fast" -# pmos: "fast" -# temperature: "0 C" -# supplies: -# VDD: "0.77 V" -# GND: "0 V" - -# Because the DCO is a dummy layout, we treat it as a physical-only cell -#par.inputs.physical_only_cells_mode: append -#par.inputs.physical_only_cells_list: -# - ExampleDCO # SRAM Compiler compiler options vlsi.core.sram_generator_tool: "sram_compiler" ## You should specify a location for the SRAM generator in the tech plugin -vlsi.core.sram_generator_tool_path: ["hammer/src/hammer-vlsi/technology/nangate45"] +vlsi.core.sram_generator_tool_path: [ + "hammer/src/hammer-vlsi/technology/nangate45"] vlsi.core.sram_generator_tool_path_meta: "append" +#---------------------- # Tool options. Replace with your tool plugin of choice. -# yosys options +#---------------------- + +# OpenROAD-yosys options vlsi.core.synthesis_tool: "yosys" vlsi.core.synthesis_tool_path: ["hammer/src/hammer-vlsi/synthesis/yosys"] vlsi.core.synthesis_tool_path_meta: "append" -# Innovus options -#vlsi.core.par_tool: "innovus" -#vlsi.core.par_tool_path: ["hammer-cadence-plugins/par"] -#vlsi.core.par_tool_path_meta: "append" -#par.innovus.version: "181" -#par.innovus.design_flow_effort: "standard" -#par.inputs.gds_merge: true -## Calibre options -#vlsi.core.drc_tool: "calibre" +# OpenROAD-par options +vlsi.core.par_tool: "openroad" +vlsi.core.par_tool_path: ["hammer/src/hammer-vlsi/par"] +vlsi.core.par_tool_path_meta: "append" + +## OpenROAD-drc options (no lvs) +#vlsi.core.drc_tool: "openroad" #vlsi.core.drc_tool_path: ["hammer-mentor-plugins/drc"] -#vlsi.core.lvs_tool: "calibre" -#vlsi.core.lvs_tool_path: ["hammer-mentor-plugins/lvs"] diff --git a/vlsi/example-vlsi b/vlsi/example-vlsi index f853a1ed..550b56c5 100755 --- a/vlsi/example-vlsi +++ b/vlsi/example-vlsi @@ -1,4 +1,8 @@ #!/usr/bin/env python3 +# +# NOTE: this ExampleDriver works for asap7 and nangate45. the custom hooks are +# only used for asap7 though. + import os import hammer_vlsi @@ -7,21 +11,24 @@ from hammer_vlsi import CLIDriver, HammerToolHookAction from typing import Dict, Callable, Optional, List def example_place_tap_cells(x: hammer_vlsi.HammerTool) -> bool: - x.append(''' + if x.get_setting("vlsi.core.technology") == "asap7": + x.append(''' # TODO # Place custom TCL here ''') return True def example_add_fillers(x: hammer_vlsi.HammerTool) -> bool: - x.append(''' + if x.get_setting("vlsi.core.technology") == "asap7": + x.append(''' # TODO # Place custom TCL here ''') return True def example_tool_settings(x: hammer_vlsi.HammerTool) -> bool: - x.append(''' + if x.get_setting("vlsi.core.technology") == "asap7": + x.append(''' # TODO # Place custom TCL here set_db route_design_bottom_routing_layer 2 @@ -34,7 +41,8 @@ def scale_final_gds(x: hammer_vlsi.HammerTool) -> bool: Scale the final GDS by a factor of 4 hammer/src/hammer-vlsi/technology/asap7/__init__.py implements scale_gds_script """ - x.append(''' + if x.get_setting("vlsi.core.technology") == "asap7": + x.append(''' # Write script out to a temporary file and execute it set fp [open "{script_file}" "w"] puts -nonewline $fp "{script_text}" diff --git a/vlsi/example-vlsi-nangate45 b/vlsi/example-vlsi-nangate45 deleted file mode 100755 index 39b9a493..00000000 --- a/vlsi/example-vlsi-nangate45 +++ /dev/null @@ -1,29 +0,0 @@ -#!/usr/bin/env python3 -import os - -import hammer_vlsi -from hammer_vlsi import CLIDriver, HammerToolHookAction - -from typing import Dict, Callable, Optional, List - -def example_place_tap_cells(x: hammer_vlsi.HammerTool) -> bool: - x.append("") - return True - -def example_add_fillers(x: hammer_vlsi.HammerTool) -> bool: - x.append("") - return True - -class ExampleDriver(CLIDriver): - def get_extra_par_hooks(self) -> List[HammerToolHookAction]: - extra_hooks = [ - # make_pre_insertion_hook will execute the custom hook before the specified step - hammer_vlsi.HammerTool.make_pre_insertion_hook("route_design", example_add_fillers), - - # make_replacement_hook will replace the specified step with a custom hook - hammer_vlsi.HammerTool.make_replacement_hook("place_tap_cells", example_place_tap_cells), - ] - return extra_hooks - -if __name__ == '__main__': - ExampleDriver().main() diff --git a/vlsi/hammer b/vlsi/hammer index c5a3cdf8..4d431566 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit c5a3cdf84987a46c91f3f879541060757bf225fb +Subproject commit 4d431566a87bac14454c969e7073a63b86e31161 From 74807d6f293aea05a42da576666da52dbef519e4 Mon Sep 17 00:00:00 2001 From: Sam Steffl Date: Mon, 22 Jun 2020 11:42:54 -0700 Subject: [PATCH 4/6] passes macro_place at 20% utilization --- vlsi/example-nangate45.yml | 2 +- vlsi/hammer | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/vlsi/example-nangate45.yml b/vlsi/example-nangate45.yml index 7d43d068..ecc07d59 100644 --- a/vlsi/example-nangate45.yml +++ b/vlsi/example-nangate45.yml @@ -39,7 +39,7 @@ vlsi.inputs.placement_constraints: x: 0 y: 0 width: 3334.72 - height: 2398.2 + height: 3798.2 margins: left: 0 right: 0 diff --git a/vlsi/hammer b/vlsi/hammer index 4d431566..0e79b8c3 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit 4d431566a87bac14454c969e7073a63b86e31161 +Subproject commit 0e79b8c31c47988b1dc0dd5d83101ab4a5b26fe0 From bfb09a68b40325b13eb46b5e52ffd01b6349f041 Mon Sep 17 00:00:00 2001 From: Sam Steffl Date: Wed, 24 Jun 2020 11:22:05 -0700 Subject: [PATCH 5/6] openroad backend works for RocketConfig through drc. no docs --- vlsi/example-nangate45.yml | 7 ++++--- vlsi/hammer | 2 +- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/vlsi/example-nangate45.yml b/vlsi/example-nangate45.yml index ecc07d59..c1c3ba63 100644 --- a/vlsi/example-nangate45.yml +++ b/vlsi/example-nangate45.yml @@ -67,6 +67,7 @@ vlsi.core.par_tool: "openroad" vlsi.core.par_tool_path: ["hammer/src/hammer-vlsi/par"] vlsi.core.par_tool_path_meta: "append" -## OpenROAD-drc options (no lvs) -#vlsi.core.drc_tool: "openroad" -#vlsi.core.drc_tool_path: ["hammer-mentor-plugins/drc"] +# OpenROAD-drc options (no lvs) +vlsi.core.drc_tool: "openroad" +vlsi.core.drc_tool_path: ["hammer/src/hammer-vlsi/drc"] +vlsi.core.drc_tool_path_meta: "append" diff --git a/vlsi/hammer b/vlsi/hammer index 0e79b8c3..70d9feec 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit 0e79b8c31c47988b1dc0dd5d83101ab4a5b26fe0 +Subproject commit 70d9feec73a9633a9462ac5896f9c35201ba0bc3 From 774716ac9dcc046136449f28d0a1950eb5dd07f3 Mon Sep 17 00:00:00 2001 From: Sam Steffl Date: Wed, 24 Jun 2020 12:05:38 -0700 Subject: [PATCH 6/6] udpated docs --- vlsi/hammer | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/vlsi/hammer b/vlsi/hammer index 70d9feec..528e745c 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit 70d9feec73a9633a9462ac5896f9c35201ba0bc3 +Subproject commit 528e745c54c3901a311aade7c928e866de1d42d2