93 lines
3.1 KiB
Verilog
93 lines
3.1 KiB
Verilog
`include "VX_define.vh"
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module VX_gpgpu_inst (
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// Input
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VX_gpu_inst_req_if gpu_inst_req_if,
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// Output
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VX_warp_ctl_if warp_ctl_if
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);
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wire[`NUM_THREADS-1:0] curr_valids = gpu_inst_req_if.valid;
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wire is_split = (gpu_inst_req_if.is_split);
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wire[`NUM_THREADS-1:0] tmc_new_mask;
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wire all_threads = `NUM_THREADS < gpu_inst_req_if.a_reg_data[0];
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genvar curr_t;
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generate
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for (curr_t = 0; curr_t < `NUM_THREADS; curr_t=curr_t+1) begin : tmc_new_mask_init
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assign tmc_new_mask[curr_t] = all_threads ? 1 : curr_t < gpu_inst_req_if.a_reg_data[0];
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end
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endgenerate
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wire valid_inst = (|curr_valids);
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assign warp_ctl_if.warp_num = gpu_inst_req_if.warp_num;
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assign warp_ctl_if.change_mask = (gpu_inst_req_if.is_tmc) && valid_inst;
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assign warp_ctl_if.thread_mask = gpu_inst_req_if.is_tmc ? tmc_new_mask : 0;
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// assign warp_ctl_if.ebreak = (gpu_inst_req_if.a_reg_data[0] == 0) && valid_inst;
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assign warp_ctl_if.ebreak = warp_ctl_if.change_mask && (warp_ctl_if.thread_mask == 0);
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wire wspawn = gpu_inst_req_if.is_wspawn;
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wire[31:0] wspawn_pc = gpu_inst_req_if.rd2;
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wire all_active = `NUM_WARPS < gpu_inst_req_if.a_reg_data[0];
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wire[`NUM_WARPS-1:0] wspawn_new_active;
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genvar curr_w;
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generate
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for (curr_w = 0; curr_w < `NUM_WARPS; curr_w=curr_w+1) begin : wspawn_new_active_init
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assign wspawn_new_active[curr_w] = all_active ? 1 : curr_w < gpu_inst_req_if.a_reg_data[0];
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end
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endgenerate
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assign warp_ctl_if.is_barrier = gpu_inst_req_if.is_barrier && valid_inst;
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assign warp_ctl_if.barrier_id = gpu_inst_req_if.a_reg_data[0];
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`DEBUG_BEGIN
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wire[31:0] num_warps_m1 = gpu_inst_req_if.rd2 - 1;
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`DEBUG_END
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assign warp_ctl_if.num_warps = num_warps_m1[$clog2(`NUM_WARPS):0];
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assign warp_ctl_if.wspawn = wspawn;
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assign warp_ctl_if.wspawn_pc = wspawn_pc;
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assign warp_ctl_if.wspawn_new_active = wspawn_new_active;
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wire[`NUM_THREADS-1:0] split_new_use_mask;
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wire[`NUM_THREADS-1:0] split_new_later_mask;
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// VX_gpu_inst_req.pc
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genvar curr_s_t;
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generate
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for (curr_s_t = 0; curr_s_t < `NUM_THREADS; curr_s_t=curr_s_t+1) begin : masks_init
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wire curr_bool = (gpu_inst_req_if.a_reg_data[curr_s_t] == 32'b1);
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assign split_new_use_mask[curr_s_t] = curr_valids[curr_s_t] & (curr_bool);
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assign split_new_later_mask[curr_s_t] = curr_valids[curr_s_t] & (!curr_bool);
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end
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endgenerate
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wire[$clog2(`NUM_THREADS):0] num_valids;
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VX_countones #(
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.N(`NUM_THREADS)
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) valids_counter (
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.valids(curr_valids),
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.count (num_valids)
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);
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// wire[`NW_BITS-1:0] num_valids = $countones(curr_valids);
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assign warp_ctl_if.is_split = is_split && (num_valids > 1);
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assign warp_ctl_if.dont_split = warp_ctl_if.is_split && ((split_new_use_mask == 0) || (split_new_use_mask == {`NUM_THREADS{1'b1}}));
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assign warp_ctl_if.split_new_mask = split_new_use_mask;
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assign warp_ctl_if.split_later_mask = split_new_later_mask;
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assign warp_ctl_if.split_save_pc = gpu_inst_req_if.pc_next;
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assign warp_ctl_if.split_warp_num = gpu_inst_req_if.warp_num;
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// gpu_inst_req_if.is_wspawn
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// gpu_inst_req_if.is_split
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// gpu_inst_req_if.is_barrier
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endmodule |