31 lines
753 B
Verilog
31 lines
753 B
Verilog
`ifndef VX_PERF_MEMSYS_IF
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`define VX_PERF_MEMSYS_IF
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`include "VX_define.vh"
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interface VX_perf_memsys_if ();
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wire [63:0] icache_reads;
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wire [63:0] icache_read_misses;
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wire [63:0] icache_mshr_stalls;
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wire [63:0] icache_crsp_stalls;
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wire [63:0] icache_dreq_stalls;
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wire [63:0] icache_pipe_stalls;
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wire [63:0] dcache_reads;
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wire [63:0] dcache_writes;
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wire [63:0] dcache_read_misses;
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wire [63:0] dcache_write_misses;
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wire [63:0] dcache_evictions;
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wire [63:0] dcache_mshr_stalls;
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wire [63:0] dcache_crsp_stalls;
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wire [63:0] dcache_dreq_stalls;
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wire [63:0] dcache_pipe_stalls;
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wire [63:0] dram_latency;
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wire [63:0] dram_requests;
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wire [63:0] dram_responses;
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endinterface
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`endif |