Blaise Tine
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cbca7e12c6
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removing ebreak signals from public interface
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2021-06-10 12:57:44 -07:00 |
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Blaise Tine
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adf033b0aa
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non-cacheable memory address critical paths optimizations
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2021-06-10 12:47:18 -07:00 |
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Blaise Tine
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41069ba188
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non-cacheable memory address fixes
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2021-06-06 20:54:36 -07:00 |
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Blaise Tine
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3071fb7a29
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adding support for non-cacheable memory addressing
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2021-06-06 13:35:55 -07:00 |
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Blaise Tine
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5d2437d887
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refactoring cache_config
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2021-05-27 14:41:46 -07:00 |
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Blaise Tine
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4c5104e96a
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fixed shared memory multi-tag requests bug
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2021-05-26 15:03:48 -07:00 |
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Blaise Tine
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d8517d4d08
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minor update
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2021-05-26 13:37:07 -07:00 |
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Blaise Tine
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c7f85b76ed
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minor update
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2021-05-26 13:36:10 -07:00 |
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Blaise Tine
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093008fa1e
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minor update
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2021-05-25 09:13:32 -07:00 |
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Blaise Tine
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6388d87ec5
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afu bug fix
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2021-05-24 18:06:11 -07:00 |
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Blaise Tine
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244f4b0964
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fixed shared memory write bug
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2021-05-23 10:57:58 -07:00 |
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Blaise Tine
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d3f0a77ae5
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fixed databus arbiter bug
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2021-05-23 10:57:02 -07:00 |
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Blaise Tine
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d80e1b28a3
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fixes for multi-channel memory support
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2021-05-20 05:36:09 -07:00 |
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Blaise Tine
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7095a46066
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minor update
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2021-05-18 11:15:36 -07:00 |
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Blaise Tine
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3e88a71801
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minor update
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2021-05-06 08:55:46 -07:00 |
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Blaise Tine
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6107bf8247
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minor fix
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2021-05-04 11:05:07 -07:00 |
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Blaise Tine
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8f451aa74c
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minor update
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2021-05-04 08:01:49 -07:00 |
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Blaise Tine
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bde6a69ea0
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adding support for multi-banks memory bus
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2021-05-04 07:32:03 -07:00 |
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Blaise Tine
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228aee1ec7
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lsu_unit pending queue bug fix
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2021-05-03 12:25:44 -07:00 |
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Blaise Tine
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bac53e4ae1
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minor update
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2021-05-02 11:05:49 -07:00 |
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Blaise Tine
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04a1c0e9eb
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IN_ORDER_MEM feature doesn't work becasue when cache bank's mem-req-queue is full, we need to schedule the mem response and skip the mshr
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2021-05-01 13:44:08 -07:00 |
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Blaise Tine
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e40a3feefa
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minor update
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2021-05-01 10:33:24 -07:00 |
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Blaise Tine
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d504adb236
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afu mem controller refactoring
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2021-05-01 08:39:52 -07:00 |
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Blaise Tine
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95f057bc2e
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fpga build refactoring
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2021-04-29 06:17:28 -07:00 |
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Blaise Tine
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64848788a1
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minor update
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2021-04-26 20:34:28 -07:00 |
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Blaise Tine
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8543e3a8bf
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code refactoring
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2021-04-26 02:34:21 -07:00 |
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Blaise Tine
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8410c49f53
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code refactoring: DRAM => MEM renaming
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2021-04-26 00:58:48 -07:00 |
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Blaise Tine
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d808aa2735
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perf counters generic size
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2021-04-25 21:15:24 -07:00 |
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Blaise Tine
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a60361ac2d
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minor update
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2021-04-25 21:10:54 -07:00 |
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Blaise Tine
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cad21a4b92
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minor update
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2021-04-24 01:17:38 -04:00 |
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Blaise Tine
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4cb98a25a7
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enabling 128-bit dram bus
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2021-04-24 00:31:27 -04:00 |
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Blaise Tine
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aff5903a22
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minor ibuffer critical path optimization.
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2021-04-19 20:53:13 -07:00 |
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Blaise Tine
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625689796f
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minor update
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2021-04-04 23:42:57 -07:00 |
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Blaise Tine
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2ce6dbb495
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minor update
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2021-04-04 17:57:35 -07:00 |
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Blaise Tine
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5cfd6e6f82
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minor updates
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2021-04-04 04:04:41 -07:00 |
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Blaise Tine
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d522611ee2
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minor update
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2021-04-03 05:07:00 -07:00 |
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Blaise Tine
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d6552a8851
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minor update
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2021-04-03 04:24:37 -07:00 |
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Blaise Tine
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f829bd3c18
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minor update
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2021-04-03 04:22:44 -07:00 |
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Blaise Tine
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1e2da696ce
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arrays logging
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2021-04-02 02:20:15 -07:00 |
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Blaise Tine
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a75accf6ed
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minor update
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2021-04-01 23:31:55 -07:00 |
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Blaise Tine
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638614fd6d
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decode optimization
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2021-04-01 19:08:15 -07:00 |
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Blaise Tine
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04a96e89c9
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minor update
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2021-04-01 12:34:18 -07:00 |
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Blaise Tine
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a194521683
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minor update
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2021-03-31 02:37:16 -07:00 |
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Blaise Tine
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d15e33e87f
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fpu dpi update
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2021-03-31 02:36:34 -07:00 |
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Blaise Tine
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b3167d763b
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minor update
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2021-03-30 22:08:26 -07:00 |
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Blaise Tine
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16bef8937b
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adding empty to index_buffer
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2021-03-30 10:15:42 -07:00 |
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Blaise Tine
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b33a994f49
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minor update
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2021-03-29 23:51:05 -07:00 |
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Blaise Tine
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fc70bb3a4a
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databus optimization
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2021-03-29 23:48:04 -07:00 |
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Blaise Tine
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8d4e2e7f70
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minor update
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2021-03-22 23:04:54 -07:00 |
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Blaise Tine
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09dbeacc14
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minor update
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2021-03-22 23:04:35 -07:00 |
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